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PDF ISL62881 Data sheet ( Hoja de datos )
| Número de pieza | ISL62881 | |
| Descripción | Single-Phase PWM Regulator | |
| Fabricantes | Intersil Corporation | |
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Single-Phase PWM Regulator for IMVP-6.5™ Mobile
CPUs and GPUs
ISL62881, ISL62881B
The ISL62881 is a single-phase PWM buck regulator for
miroprocessor or graphics processor core power supply.
It uses an integrated gate drivers to provide a complete
solution. The PWM modulator of ISL62881 is based on
Intersil's Robust Ripple Regulator (R3) technology™.
Compared with traditional modulators, the R3™
modulator commands variable switching frequency
during load transients, achieving faster transient
response. With the same modulator, the switching
frequency is reduced at light load, increasing the
regulator efficiency.
The ISL62881 can be configured as CPU or graphics
Vcore controller and is fully compliant with IMVP-6.5™
specifications. It responds to DPRSLPVR signals by
entering/exiting diode emulation mode. It reports the
regulator output current through the IMON pin. It senses
the current by using either discrete resistor or inductor
DCR whose variation over-temperature can be thermally
compensated by a single NTC thermistor. It uses
differential remote voltage sensing to accurately regulate
the processor die voltage. The adaptive body diode
conduction time reduction function minimizes the body
diode conduction loss in diode emulation mode.
User-selectable overshoot reduction function offers an
option to aggressively reduce the output capacitors as
well as the option to disable it for users concerned about
increased system thermal stress.
Maintaining all the ISL62881 functions, the ISL62881B
offers VR_TT# function for thermal throttling control. It
www.aDlastoaSohfefeetr4sUt.hcoemsplit LGATE function to further improve
light load efficiency.
Features
• Precision Core Voltage Regulation
- 0.5% System Accuracy Over-Temperature
- Enhanced Load Line Accuracy
• Voltage Identification Input
- 7-Bit VID Input, 0V to 1.500V in 12.5mV Steps
- Supports VID Changes On-The-Fly
• Supports Multiple Current Sensing Methods
- Lossless Inductor DCR Current Sensing
- Precision Resistor Current Sensing
• Superior Noise Immunity and Transient Response
• Current Monitor
• Differential Remote Voltage Sensing
• High Efficiency Across Entire Load Range
• Integrated Gate Driver
• Split LGATE Driver to Increase Light-Load Efficiency
(For ISL62881B)
• Adaptive Body Diode Conduction Time Reduction
• User-selectable Overshoot Reduction Function
• Capable of Disabling the Droop Function
• Audio-filtering for GPU Application
• Small Footprint 28 Ld 4x4 TQFN Package
• Pb-Free (RoHS Compliant)
Applications
• Notebook Computers
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL62881HRTZ*
628 81HRTZ
-10 to +100
28 Ld 4x4 TQFN
L28.4x4
ISL62881BHRTZ*
62881B HRTZ
-10 to +100
32 Ld 5x5 TQFN
L32.5x5E
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach
materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL62881, ISL62881B. For more information on
MSL please see techbrief TB363.
October 26, 2009
FN6924.0
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL62881, ISL62881B
Absolute Maximum Ratings
Supply Voltage, VDD. . . . . . . . . . . . . . . . . . . .-0.3V to +7V
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . +28V
Boot Voltage (BOOT) . . . . . . . . . . . . . . . . . . -0.3V to +33V
Boot to Phase Voltage (BOOT-PHASE) . . . . -0.3V to +7V(DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +9V(<10ns)
Phase Voltage (PHASE) . . . . . -7V (<20ns Pulse Width, 10µJ)
UGATE Voltage (UGATE) . . . . . . . PHASE-0.3V (DC) to BOOT
. . . . . . . . . PHASE-5V (<20ns Pulse Width, 10µJ) to BOOT
LGATE Voltage (LGATE) . . . . . . . . -0.3V (DC) to VDD + 0.3V
. . . . . . . . . -2.5V (<20ns Pulse Width, 5µJ) to VDD + 0.3V
All Other Pins. . . . . . . . . . . . . . . . . . -0.3V to (VDD + 0.3V)
Open Drain Outputs, PGOOD, VR_TT#, CLK_EN#
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3V to +7V
Thermal Information
Thermal Resistance (Typical, Notes 4, 5)θJA (°C/W) θJC (°C/W)
28 Ld TQFN Package. . . . . . . . . . .
40
3
32 Ld TQFN Package. . . . . . . . . . .
32
3
Maximum Junction Temperature . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . +5V ±5%
Battery Voltage, VIN . . . . . . . . . . . . . . . . . . . . +5V to 25V
Ambient Temperature . . . . . . . . . . . . . . . -10°C to +100°C
Junction Temperature . . . . . . . . . . . . . . . -10°C to +125°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Operating Conditions: VDD = 5V, TA = -10°C to +100°C, fSW = 300kHz, unless otherwise
noted. Boldface limits apply over the operating temperature range, -10°C to
+100°C.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
MAX
(Note 7) TYP (Note 7) UNITS
INPUT POWER SUPPLY
+5V Supply Current
IVDD
VR_ON = 1V
VR_ON = 0V
3.2 4.0
1
mA
µA
Battery Supply Current
IVIN
VR_ON = 0V
VIN Input Resistance
RVIN
VR_ON = 1V
Power-On-Reset Threshold
PORr
VDD rising
PORf
VDD falling
SYSTEM AND REFERENCES
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System Accuracy
%Error (VCC_CORE) No load; closed loop, active mode range
VID = 0.75V to 1.50V
4.00
900
4.35
4.15
1
4.5
-0.5
+0.5
µA
kΩ
V
V
%
VID = 0.5V to 0.7375V
-8 +8 mV
VID = 0.3V to 0.4875V
-15
+15
mV
VBOOT
Maximum Output Voltage
Minimum Output Voltage
(Note 6)
VCC_CORE(max)
VCC_CORE(min)
VID = [0000000]
VID = [1111111]
1.0945 1.100 1.1055
1.500
0
V
V
V
RBIAS Voltage
CHANNEL FREQUENCY
RBIAS = 147kΩ
1.45 1.47 1.49
V
Nominal Channel Frequency
Adjustment Range
fSW(nom)
RFSET = 7kΩ, VCOMP = 1V
295 310 325
200
500
kHz
kHz
AMPLIFIERS
Current-Sense Amplifier
Input Offset
IFB = 0A
-0.15
+0.15 mV
Error Amp DC Gain (Note 6)
Error Amp Gain-Bandwidth
Product (Note 6)
Av0
GBW
CL = 20pF
90 dB
18 MHz
5 FN6924.0
October 26, 2009
5 Page 
ISL62881, ISL62881B
Theory of Operation
Multiphase R3™ Modulator
VW MASTER CLOCK CIRCUIT
MASTER COMP
CLOCK VCRM
CLOCK
GMVO
CRM
VW
VCRS
CRS
SLAVE CIRCUIT
CLOCK S PWM
Q
R PHASE
GM
L
IL
VO
CO
FIGURE 5. R3™ MODULATOR CIRCUIT
VW
VCRM
COMP
CLOCK
PWM
VCRS
VW
HYSTERETIC
W IND O W
FIGURE 6. R3™ MODULATOR OPERATION PRINCIPLES
IN STEADY STATE
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VW
VCRM
COMP
CLOCK
PWM
VW
The ISL62881 is a single-phase regulator implementing
Intel® IMVP-6.5™ protocol. It uses Intersil patented
R3™(Robust Ripple Regulator™) modulator. The R3™
modulator combines the best features of fixed frequency
PWM and hysteretic PWM while eliminating many of their
shortcomings. Figure 5 conceptually shows the ISL62881
R3™ modulator circuit, and Figure 6 shows the operation
principles.
A current source flows from the VW pin to the COMP pin,
creating a voltage window set by the resistor between
between the two pins. This voltage window is called VW
window in the following discussion.
Inside the IC, the modulator uses the master clock circuit
to generate the clocks for the slave circuit. The
modulator discharges the ripple capacitor Crm with a
current source equal to gmVo, where gm is a gain factor.
Crm voltage Vcrm is a sawtooth waveform traversing
between the VW and COMP voltages. It resets to VW
when it hits COMP, and generates a one-shot clock
signal.
The slave circuit has its own ripple capacitor Crs, whose
voltage mimics the inductor ripple current. A gm
amplifier converts the inductor voltage into a current
source to charge and discharge Crs. The slave circuit
turns on its PWM pulse upon receiving the clock signal,
and the current source charges Crs. When Crs voltage
VCrs hits VW, the slave circuit turns off the PWM pulse,
and the current source discharges Crs.
Since the ISL62881 works with Vcrs, which is large-
amplitude and noise-free synthesized signal, the
ISL62881 achieves lower phase jitter than conventional
hysteretic mode and fixed PWM mode controllers. Unlike
conventional hysteretic mode converters, the ISL62881
has an error amplifier that allows the controller to
maintain a 0.5% output voltage accuracy.
Figure 7 shows the operation principles during load
insertion response. The COMP voltage rises during load
insertion, generating the clock signal more quickly, so the
PWM pulse turns on earlier, increasing the effective
switching frequency, which allows for higher control loop
bandwidth than conventional fixed frequency PWM
controllers. The VW voltage rises as the COMP voltage
rises, making the PWM pulse wider. During load release
response, the COMP voltage falls. It takes the master
clock circuit longer to generate the next clock signal so
the PWM pulse is held off until needed. The VW voltage
falls as the VW voltage falls, reducing the current PWM
pulse width. This kind of behavior gives the ISL62881
excellent response speed.
VCRS
FIGURE 7. R3™ MODULATOR OPERATION PRINCIPLES
IN LOAD INSERTION RESPONSE
11
FN6924.0
October 26, 2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ISL62881.PDF ] | |
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