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FDMF6704 の電気的特性と機能

FDMF6704のメーカーはFairchild Semiconductorです、この部品の機能は「High Frequency DrMOS Module」です。


製品の詳細 ( Datasheet PDF )

部品番号 FDMF6704
部品説明 High Frequency DrMOS Module
メーカ Fairchild Semiconductor
ロゴ Fairchild Semiconductor ロゴ 




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FDMF6704 Datasheet, FDMF6704 PDF,ピン配置, 機能
September 2008
FDMF6704 - XSTM DrMOS
The Xtra Small High Performance, High Frequency DrMOS Module tm
Benefits
Ultra compact size - 6 mm x 6 mm MLP, 44 % space
saving compared to conventional MLP 8 mm x 8 mm
DrMOS packages.
Fully optimized system efficiency.
Clean voltage waveforms with reduced ringing.
High frequency operation.
Compatible with a wide variety of PWM controllers in the
market.
Features
Ultra- compact thermally enhanced 6 mm x 6 mm MLP
package 84 % smaller than conventional discrete solutions.
Synchronous driver plus FET multichip module.
High current handling of 35 A.
Over 93 % peak efficiency.
Tri-State PWM input.
Fairchild's PowerTrench® 5 technology MOSFETs for clean
voltage waveforms and reduced ringing.
Optimized for high switching frequencies of up to 1 MHz.
Skip mode SMOD [low side gate turn off] input.
Fairchild SyncFETTM [integrated Schottky diode] technology
in the low side MOSFET.
Integrated bootstrap Schottky diode.
Adaptive gate drive timing for shoot-through protection.
Driver output disable function [DISB# pin].
Undervoltage lockout (UVLO).
Fairchild Green Packaging and RoHS
www.DataSheetc4oUm.cpolimant. Low profile SMD package.
Power Train Application Circuit
General Description
The XSTM DrMOS family is Fairchild’s next-generation fully-
optimized ultra-compact integrated MOSFET plus driver power
stage solution for high current, high frequency synchronous
buck DC-DC applications. The FDMF6704 DrMOS integrates a
driver IC, two power MOSFETs and a bootstrap Schottky diode
into a thermally enhanced compact 6 mm x 6 mm MLP
package. With an integrated approach, the complete switching
power stage is optimized with regards to driver and MOSFET
dynamic performance, system inductance and RDS(ON). This
greatly reduces the package parasitics and layout challenges
associated with conventional discrete solutions. The driver IC
incorporates advanced features such as SMOD. PWM input is
Tri-State compatible. A 5 V gate drive and an improved PCB
interface [Low Side MOSFET exposed pad] ensure higher
performance. This product is compatible with the new Intel
6 mm x 6 mm DrMOS specification.
Applications
Compact blade servers V-core, non V-core and VTT DC-DC
converters.
Desktop computers V-core, non V-core and VTT DC-DC
converters.
Workstations V-core, non V-core and VTT DC-DC
converters.
Gaming Motherboards V-core, non V-core and VTT DC-DC
converters.
Gaming consoles.
High-current DC-DC Point of Load (POL) converters.
Networking and telecom microprocessor voltage regulators.
5V
CVDRV
CVCIN
DISB#
PWM Input
OFF
ON
VDRV VCIN
DISB#
VIN
BOOT
PWM
SMOD#
PHASE
VSWH
CGND PGND
12 V
CVIN
CBOOT
OUTPUT
COUT
Ordering Information
Figure 1. Power Train Application Circuit
Part
FDMF6704
Current Rating @ 350 kHz
[A]
35
Input Voltage Typical
[V]
8-14
Frequency Max
[kHz]
1000
©2008 Fairchild Semiconductor Corporation
FDMF6704 Rev.D
1
Device
Marking
FDMF6704
www.fairchildsemi.com

1 Page





FDMF6704 pdf, ピン配列
Pin Description
Pin Name
1 SMOD#
2 VCIN
3 VDRV
4
5, 37
6
7
8, 38
9-14
15, 29-35
16-28
36
39
40
BOOT
CGND
HDRV
PHASE
NC
VIN
VSWH
PGND
LDRV
DISB#
PWM
Function
When SMOD# = HI, low side driver is inverse of PWM input. When SMOD# = Low, low
side driver is disabled.
IC bias supply. Minimum 1 F ceramic capacitor is recommended from this pin to CGND.
Power for low side driver. Minimum 1 F ceramic capacitor is recommended to be
connected as close as possible from this pin to CGND.
Bootstrap supply input. Provides voltage supply to high-side MOSFET driver. Connect
bootstrap capacitor from this pin to PHASE.
IC ground. Ground return for driver IC.
For manufacturing test only. This pin must be floated. Must not be connected to any pin.
Switch node pin for easy bootstrap capacitor routing. Electrically shorted to VSWH pin.
No connect.
Power input. Output stage supply voltage.
Switch node input. Provides return for high-side bootstrapped driver and acts as a
sense point for the adaptive shoot-thru protection.
Power ground. Output stage ground. Source pin of low side MOSFET(s).
For manufacturing test only. This pin must be floated. Must not be connected to any pin.
Output disable. When low, this pin disable FET switching (HDRV and LDRV are held low).
PWM Signal Input. This pin accepts a Tri-state logic-level PWM signal from the controller.
Absolute Maximum Rating
Parameter
VCIN, VDRV, DISB#, PWM, SMOD#, LDRV to CGND
VIN to PGND, CGND
BOOT, HDRV to VSWH
BOOT, VSWH, HDRV to GND
BOOT to VDRV
www.DataSheet4U.com
IO(AV)
VIN = 12 V, VO = 1.3 V
fSW = 350 kHz
fSW = 1 MHz
IO(peak)
RθJPCB
Junction to PCB Thermal Resistance
Operating and Storage Junction Temperature Range
Min
-55
Max
6
27
6
27
22
35
32
80
3.75
150
Units
V
V
V
V
V
A
A
A
°C/W
°C
Recommended Operating Range
Parameter
VCIN
VIN
Control Circuit Supply Voltage
Output Stage Supply Voltage
* May be operated at lower input voltage. See figure 8.
Min Typ Max Units
4.5 5 5.5 V
8* 12 14 V
FDMF6704 Rev. D
3 www.fairchildsemi.com


3Pages


FDMF6704 電子部品, 半導体
PWM Input
DrvL
DrvLLOW
tDTHH
90 %
1V
tDTLH
Tristate
HDRV to SW
Timeout
SW
SW_Low
1V
tPDHL
tPDLL
250 ns
Figure 4. Adaptive Gate Drive Timing
Hold off Time
www.DataSheet4U.com
FDMF6704 Rev. D
6 www.fairchildsemi.com

6 Page



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Link :


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