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PDF MM1136 Data sheet ( Hoja de datos )
| Número de pieza | MM1136 | |
| Descripción | (MM1135 / MM1136) System Reset (with built-in watchdog timer) Monolithic IC | |
| Fabricantes | Mitsumi Electronics | |
| Logotipo |  |
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( DataSheet : www.DataSheet4U.com )
MITSUMI
System Reset (with built-in watchdog timer) MM1135, MM1136
System Reset (with built-in watchdog timer)
Monolithic IC MM1135, MM1136
Outline
These ICs were developed to drive low voltage batteries, and have a watchdog timer with built-in
microcomputer reset voltage detection circuit and low battery detection circuit.
A single reference voltage is used for low battery voltage detection and microcomputer reset voltage
detection, so detection voltage difference is uniform (.=. 0.2V). Further, there is a built-in watchdog timer for
operation diagnosis, which prevents the system from running wild by generating an intermittent reset pulse
during system mis-operation.
Features
1. Accurate voltage drop detection voltage
1. Low battery detection
3.4V±3%
2. Power supply voltage detection 3.2V±3%
3. Detection voltage error
0.2V±20mV 1-2
4. Hysteresis Both
50mV typ.
2. Watchdog function stop pin (can be made to function only as reset IC during VCC rise)
3. Low current consumption
150µA typ.
Package
SOP-8C (MM1135XF, MM1136XF)
Applications
1. 3V cordless telephones
2. Various types of small, handy equipment
Series Table
Model
MM1135
MM1136
VSLB
3.4V
TPR : Reset hold time during VCC rise
TWD : Timer monitoring time
TWR : Reset time
VSLB : Battery check detection voltage
VSLR : Reset detection voltage
VSLR
3.2V
TPR
100mS
100mS
TWD
10mS
100mS
TWR
2mS
2mS
*CT=0.02µF
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MITSUMI
System Reset (with built-in watchdog timer) MM1135, MM1136
VCC input pulse width
CK input pulse width
TPI VCC
TCKW CK
3.8V
2.8V
TCKW
or
TPI
8
3
µS
µS
CK input cycle
TCK CK
TCK
20 µS
*Watchdog timer monitoring time 1
Watchdog timer
*reset time 2
Reset hold time for
*power supply rise 3
------------------------------------------
RESET delay time
BC delay time
------------------------------------------
RESET rise time
------------------------------------------
RESET fall time
BC rise time
BC fall time
TWD
TWR
TPR
tPDR
tPDB
tRR
tFR
tRB
tFB
CT=0.02µF
CT=0.02µF
CT=0.02µF
VCC : High Low, RLR=10kΩ, CLR=15pF
VCC : High Low, RLB=4.7kΩ, CLB=15pF
RLR=10kΩ, CLR=15pF
RLR=10kΩ, CLR=15pF
RLB=4.7kΩ, CLB=15pF
RLB=4.7kΩ, CLB=15pF
50 100 150 mS
1 2 3 mS
50 100 150 mS
10 µS
10 µS
10 µS
2 µS
10 µS
2 µS
Notes:
*1 Monitoring time is the time from the last pulse (negative edge) of the timer clear clock pulse until reset
pulse output.
In other words, reset output is output if a clock pulse is not input during this time.
*2 Reset time means reset pulse width. However, this does not apply to power ON reset.
*3 Reset hold time is the time from when VCC exceeds detection voltage (VSHR) during power ON reset until
-----------------------------------------------------
reset release (RESET output high).
*4 Watchdog timer monitoring time (TWD), watchdog timer reset time (TWR) and reset hold time (TPR) during
power supply rise can be changed by varying CT capacitance. The times are expressed by the following
formulae.
TPR (mS) .=. 5000 CT (µF)
TWD (mS) .=. 5000 CT (µF)
TWR (mS) .=. 100 CT (µF)
Example : When CT=0.02µF
TPR .=. 100mS
TWD .=. 100mS
TWR .=. 2mS
*5 TWD can be varied by placing a resistor (1MEGΩ or more) between the RCT pin and VCC.
*6 The voltage range when measuring output rise and fall time is 10~90%.
*7 VCC rise time should be 100µS or more, and fall time should be 50µS or more.
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet MM1136.PDF ] | |
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