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A8651 の電気的特性と機能

A8651のメーカーはAllegroです、この部品の機能は「Low Input Voltage Adjustable Frequency Dual Synchronous 2 A / 2 A Buck Regulator」です。


製品の詳細 ( Datasheet PDF )

部品番号
A8651
部品説明
Low Input Voltage Adjustable Frequency Dual Synchronous 2 A / 2 A Buck Regulator
メーカ
Allegro
ロゴ

Allegro ロゴ 




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A8651 Datasheet, A8651 PDF,ピン配置, 機能
A8651
Low Input Voltage, Adjustable Frequency Dual Synchronous
2A / 2A Buck Regulator with Synchronization, 2x EN, and 2x NPOR
Features and Benefits
• AEC-Q100 Qualified
• Operating voltage range: 2.5 to 5.5 V
• UVLO stop threshold: 2.25 V (max)
• Dual outputs with up to 2 A output current per regulator
• Adjustable output voltage as low as 0.8 V
• Internal 80 mΩ high-side switching MOSFET
• Internal 55 mΩ low-side switching MOSFET
• Adjustable switching frequency ( fSW): 0.35 to 2.2 MHz
• Synchronizes to external clock: 1.2 × to 1.5 × fOSC
• 180° phase shift between switching regulators
• Sleep mode supply current less than 5 μA
• Soft start time externally set via the SS pin
• Pre-biased startup capable
• Externally adjustable compensation
• Stable with ceramic output capacitors
• Independent enable inputs and NPOR output pins
• Adjustable current limiting (OCP) for each regulator
• Hiccup mode short-circuit protection (HIC)
• Overvoltage and overtemperature protection
• Open-circuit and adjacent pin short-circuit tolerant
• Short-to-ground tolerant at every pin
Package: 20-pin TSSOP with exposed
thermal pad (suffix LP)
Not to scale
Description
The A8651 is an adjustable frequency, high output current,
PWM regulator that integrates a high-side, P-channel MOSFET
and a low-side, N-channel MOSFET. The A8651 incorporates
current-mode control to provide simple compensation, excellent
loop stability, and fast transient response. The A8651 utilizes
external compensation to accommodate a wide range of power
components to optimize transient response without sacrificing
stability. The A8651 regulates input voltages from 2.5 to 5.5 V,
down to output voltages as low as 0.8 V and is able to supply
up to 2 A of load current per regulator.
The A8651 features include an externally adjustable and
synchronizable switching frequency, an externally-set soft
start time to minimize inrush currents, independent EN inputs,
and independent NPOR outputs with 7.5 ms delay. The sleep
mode current of the A8651 control circuitry is less than 5 μA.
Protection features includeVIN undervoltage lockout (UVLO),
cycle-by-cycle overcurrent protection (OCP), hiccup mode
short-circuit protection (HIC), overvoltage protection (OVP),
and thermal shutdown (TSD). In addition, the A8651 provides
open-circuit, adjacent pin short-circuit, and short-to-ground
Continued on the next page…
Applications:
• GPS/Infotainment
• Automotive audio
• Home audio
• Network and telecom
SYNCin
CSYNC DSYNC
VIN
EN1
CP1
RZ1
CZ1
EN2
CP2
RZ2
CZ2
Typical Application Diagram
5 FSET/SYNC
RFSET
SW1 1
CIN1
20 VIN1
16 GND
2 PGND1
CSS1
3 EN1
17 COMP1
19
4
SS1
ISET1
RSET1
11 VIN2
A8651
FB1 18
NPOR1 15
SW2 10
CIN2
9 PGND2
FB2 14
CSS2
8 EN2
13
12
7
COMP2
SS2
ISET2
NPOR2 6
RSET2
LO1
RFB1
RFB2
LO2
RFB3
RFB4
VOUT1
CO1
RPU1
NPOR1
VOUT2
CO2
RPU2
NPOR2
A8651-DS
Free Datasheet http://www.Datasheet4U.com

1 Page





A8651 pdf, ピン配列
A8651
Low Input Voltage, Adjustable Frequency Dual Synchronous
2A / 2A Buck Regulator with Synchronization, 2x EN, and 2x NPOR
Table of Contents
Specifications
Thermal Characteristics
Pin-out Diagram and Terminal List
Absolute Maximum Ratings
Top Level Functional Block Diagram
Detailed Functional Block Diagram
Pin-out Diagram and Terminal List
Electrical Characteristics
Characteristic Performance
Timing Diagram
Functional Description
Overview
Reference Voltage
Oscillator/Switching Frequency (RFSET, fOSC)
Transconductance Error Amplifier
Slope Compensation
ENX, VINX, and Sleep Mode
Synchronization (FSET/SYNC)
Power MOSFETs
Pulse Width Modulation (PWM)
Current Sense Amplifier
2
2
2
2
4
5
6
7
10
12
13
13
13
13
13
13
14
14
14
14
14
Soft Start (Startup) and Inrush Current Control
Pre-Biased Startup
Active Low Power-On Reset (NPORx)
Protection Features
Undervoltage Lockout (UVLO)
Thermal Shutdown (TSD)
Overvoltage Protection (OVP)
Pulse-by-Pulse Overcurrent Protection (OCP)
Design and Component Selection
Setting the Output Voltage (VOUT1, RFBx )
PWM Switching Frequency (RFSET)
Output Inductor (LO)
Output Capacitors
Input Capacitors
Soft Start and Hiccup Mode Timing (CSS1)
Compensation Components (RZ, CZ, CP)
A Generalized Tuning Procedure
Power Dissipation and Thermal Calculations
PCB Component Placement and Routing
14
15
16
16
16
16
16
16
20
20
20
21
22
22
23
24
26
28
30
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
Free Datasheet http://www.Datasheet4U.com


3Pages


A8651 電子部品, 半導体
A8651
Low Input Voltage, Adjustable Frequency Dual Synchronous
2A / 2A Buck Regulator with Synchronization, 2x EN, and 2x NPOR
Pin-out Diagram
SW1 1
PGND1 2
EN1 3
ISET1 4
FSET/SYNC 5
NPOR2 6
ISET2 7
EN2 8
PGND2 9
SW2 10
PAD
20 VIN1
19 SS1
18 FB1
17 COMP1
16 GND
15 NPOR1
14 FB2
13 COMP2
12 SS2
11 VIN2
Terminal List Table
Number
Name
1, 10
SW1, SW2
2, 9 PGND1, PGND2
3, 8 EN1, EN2
4, 7 ISET1, ISET2
5 FSET/SYNC
6, 15
NPOR2, NPOR1
11, 20
VIN2, VIN1
12, 19
SS2, SS1
13, 17
COMP2, COMP1
14, 18
16
FB2, FB1
GND
PAD
Function
The drains of the internal high-side P-channel MOSFETs. The output inductors should be connected
to these pins. The output inductors should be placed as close as possible to these pins and be
connected with relatively wide traces.
Power ground pins for switcher 1 and switcher 2.
Inputs to enable switcher 1 and/or enable switcher 2.
Pulse–by-pulse current limit setting pins.
A resistor, RFSET, from this pin to GND sets the base PWM switching frequency (fOSC). If an external
clock is AC-coupled to this pin by a 22 pF capacitor, the switching frequency of the regulator can be
increased higher than fOSC.
Active low, open-drain fault indication outputs, with fixed delay.
Power inputs for the control circuits and the sources of the internal high-side P-channel MOSFETs.
VIN1 is the primary supply and must be present for the A8651 to operate. At least one high quality
ceramic capacitor must be placed very close to these pins.
Soft-start pins. Connect a capacitor, from these pins to GND to set the soft-start time. These
capacitors also determine the hiccup period during an overcurrent condition.
Outputs of the error amplifiers and compensation nodes for the current mode control loops. Connect
a series RC network from these pins to GND for loop compensation. See the Design and Component
Selection section of this datasheet for further details.
Feedback (negative) inputs to the error amplifiers. Connect a resistor divider from the converter output
nodes to these pins to program the output voltages.
Ground.
Exposed pad of the package providing enhanced thermal dissipation. This pad must be connected to
the ground plane(s) of the PCB with at least 6 vias, directly in the pad.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
6
Free Datasheet http://www.Datasheet4U.com

6 Page

合計 : 30 ページ
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部品番号部品説明メーカ
A8651

Low Input Voltage Adjustable Frequency Dual Synchronous 2 A / 2 A Buck Regulator

Allegro
Allegro
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