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XE3005 の電気的特性と機能

XE3005のメーカーはETCです、この部品の機能は「(XE3005 / XE3006) Low-Power Audio CODEC」です。


製品の詳細 ( Datasheet PDF )

部品番号
XE3005
部品説明
(XE3005 / XE3006) Low-Power Audio CODEC
メーカ
ETC
ロゴ

ETC ロゴ 




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XE3005 Datasheet, XE3005 PDF,ピン配置, 機能
Data Sheet
XE3005/XE3006
VSSD VSSA VSSA VDD VREF
VREG11
VREG16
Microphone
Bias
XE3006
AIN
Amp.
Σ∆
modulator
Decimator
Power supply
management
PWM
DAC
Power
amplifier
SPI
Sandman
Functions
Serial Audio
Interface
Clock
mgt
RESET
VDDPA
AOUTP
AOUTN
VSSPA
MISO SS SCK MOSI SMAD SMDA BCLK SDI SDO FSYNC MCLK
XE3005 / XE3006
Low-Power Audio CODEC
General Description
The XE3005 is an ultra low-power CODEC (Analog
to Digital and Digital to Analog Converter) for voice
and audio applications. It includes microphone
supply, preamplifier, 16-bit ADC, 16-bit DAC, serial
audio interface, power management and clock
management for the ADC and the DAC. The
sampling frequency of the ADC and of the DAC
can be adjusted from 4 kHz to 48 kHz.
The XE3006 also includes the Sandman™
function, which signals whether a relevant voice or
audio signal is present for the ADC or DAC.
Features
Ultra low-power consumption, below 2 mW
Low-voltage operation down to 1.8 V
Sandman™ function to reduce system
power consumption (XE3006)
Single supply voltage
Adjustable sampling frequency: 4 – 48 kHz
Digital format: 16 bit 2s complement
Requires a minimum number of external
components
Easy interfacing to various DSPs
Direct connection to microphone and
speaker
Various programming options
Applications
Wireless Headsets
Bluetooth™ headset
Hands-free telephony
Digital hearing instruments
Consumer and multimedia applications
All battery-operated portable audio
devices
Quick Reference Data
supply voltage
current (@20 kHz sampling)
sampling frequency
Typical dynamic range ADC
Typical dynamic range DAC
1.8 – 3.6 V
0.4 mA
4 – 48 kHz
78 dB
78 dB
Ordering Information
Part Package
Ext. part no.
XE3005 TSSOP 20 pins
XE3006 TSSOP 24 pins
XE3005I033
XE3006I019
Temperature
range
-20 to 70° C
-20 to 70° C
Cool Solutions for Wireless Connectivity
XEMICS SA e-mail: [email protected] web: www.xemics.com

1 Page





XE3005 pdf, ピン配列
Data Sheet
XE3005/XE3006
1 Device Description
1 MCLK
2 SMAD
3 SMDA
4 VDD
5 NRESET
6 VSSA
7 VREG16
8 VREF
9 VSSA
10 VSSD
11 VREG11
12 AIN
MOSI 24
SS 23
SCK 22
MISO 21
SDI 20
SDO 19
BCLK 18
FSYNC 17
AOUTP 16
VDDPA 15
AOUTN 14
VSSPA 13
1 MCLK
2 SS
3 VDD
4 NRESET
5 VREG16
6 VREF
7 VSSA
8 VSSD
9 VREG11
10 AIN
MOSI 20
SCK 19
SDI 18
SDO 17
BCLK 16
FSYNC 15
AOUTP 14
VDDPA 13
AOUTN 12
VSSPA 11
Figure 1: Pin layout of the XE3006 and XE3005
The XE3006 is available in a TSSOP24 package. The XE3005 is available in a TSSOP20 package. Detailed
information is found in chapter 8, Mechanical Information.
1.1 Terminal Descriptions XE3005/6
Terminals
Type 1
Description
XE3006 XE3005
Name
1
1
MCLK
DI Master Clock. MCLK derives the internal clocks of ADC and DAC
2 N/A SMAD DO Sandman output ADC
3 N/A SMDA DO Sandman output DAC
4
3
VDD
AI Digital power supply
5
4
NRESET
ZI/O
Reset signal generated by the CODEC. If required, the reset signal can
be applied externally to initialize all the internal CODEC registers
6 N/A VSSA AI Analog ground
7 5 VREG16 AO Regulator voltage 1.6 V. Can be used to supply the microphone
8
6
VREF
AO Reference voltage
9
7
VSSA
AI Analog ground
10
8
VSSD
AI Digital ground
11 9 VREG11 AO ADC Regulated microphone output supply voltage 1.1 V
12 10 AIN AI ADC Analog input signal
13 11 VSSPA AI DAC Power Amplifier Ground
14 12 AOUTN AO DAC Analog Output negative
15 13 VDDPA AI DAC Power Amplifier Supply
16 14 AOUTP AO DAC Analog Output positive
17 15 FSYNC DI/O Serial audio interface Frame Synchronization
18
16
BCLK
DI/O Serial audio interface Bit Clock
19 17
SDO
ZO Serial audio interface Data Output
20 18
SDI DI PD Serial audio interface Data Input
21 N/A MISO
ZO SPI Master In Slave Out
22 19
SCK DI PD SPI Serial Clock
23 2
SS DI PU SPI Slave Select
24 20 MOSI DI PD SPI Master Out Slave In
Note: (1) AI = Analog Input
AO = Analog Output
DI = Digital Input
DO = Digital Output
DI/O = Digital In or Out ZO = Hi Impedance or Output
PU = internal Pull Up
PD = internal Pull Down
ZI/O = Hi impedance In or Out
3 D0212-116


3Pages


XE3005 電子部品, 半導体
Data Sheet
XE3005/XE3006
2.1.3 DAC Signal Channel
The DAC is based on a multi bit sigma-delta modulator, which operates at a frequency of 8 times the sampling
rate. The outputs of the modulator are 2’s complement words of 6 bit. A pulse-width modulator (PWM) converts
the 6 bit words into 2 single bit streams at 256 times the sampling frequency. Finally the 2 bit streams are
supplied to the power amplifier. The Power Amplifier is a Class D amplifier, which offers higher efficiency than the
traditional Class AB topologies. It uses a three-state unbalanced PWM. This means that both channels of the PA
(AOUTP and AOUTN) will not switch at the same time, therefore the outputs are not purely differential (see figure
5 and 6)
XE3005/6
From Serial Audio
Interface
Interpolator
&
Modulator
Pulse Width
Modulator
P
N
dac_in(15:0)
@ Fsync
pwm_in(5:0)
@ 8xFsync
bit streams
@ 256xFsync
VDDPA
PN
Power
Amplifier
PN
AOUTP
AOUTN
VSSPA
s
s=1 s=0
Figure 5: DAC block diagram
Figure 6 shows the relation of input and output samples of the PWM (The timing diagram is not to scale in the
time-axis).
pwm_in(5:0) = 1
1
0
1
0
VDDPA
VSSPA
-VDDPA
1/(256 x Fsync)
pwm_in(5:0) = -1 pwm_in(5:0) = 0
1/(256 x Fsync)
1/(8 x Fsync)
pwm_in(5:0) = 2
P
N
OUTP-OUTN
2/(256 x Fsync)
Figure 6: examples PWM in and out (not to scale)
The DAC receives 16-bit wide 2’s complement format through the Serial Audio Interface. The protocol can be
selected through register J. The complete DAC and PA amplifier chain can be powered-down through register I.
6 D0212-116

6 Page

合計 : 32 ページ
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部品番号部品説明メーカ
XE3005

(XE3005 / XE3006) Low-Power Audio CODEC

ETC
ETC
XE3006

(XE3005 / XE3006) Low-Power Audio CODEC

ETC
ETC

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