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XCV300E-7HQ240C データシート PDF 検索 |
| 番号 | 部品番号 | 部品説明 | メーカ | |
| 1 | XCV300E-7HQ240C | Virtex-E 1.8 V Field Programmable Gate Arrays 0 R Virtex™-E 1.8 V Field Programmable Gate Arrays 0 0 DS022-1 (v2.2) November 9, 2001 Preliminary Product Specification Features • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed for low-power operation - PCI compliant 3.3 V, 32/64-bit, 33/ 66-MHz Highly Flexible SelectI/O+™ T |
 Xilinx |
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XCV300E-7HQ2 データシート - 検索結果 |
| 部品番号 | 部品説明 | メーカ | |
| XCV300E-7HQ240I | Virtex-E 1.8 V Field Programmable Gate Arrays 0 R Virtex™-E 1.8 V Field Programmable Gate Arrays 0 0 DS022-1 (v2.2) November 9, 2001 Preliminary Product Specification Features • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed |
Xilinx |
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| XCV300E-7HQ240C | Virtex-E 1.8 V Field Programmable Gate Arrays 0 R Virtex™-E 1.8 V Field Programmable Gate Arrays 0 0 DS022-1 (v2.2) November 9, 2001 Preliminary Product Specification Features • Fast, High-Density 1.8 V FPGA Family - Densities from 58 k to 4 M system gates - 130 MHz internal performance (four LUT levels) - Designed |
Xilinx |
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| ALC887 | The ALC887 is a 7.1 Channel High Definition Audio Codec with two independent SPDIF outputs. Featuring eight channels of DAC support 7.1 sound playback, and integrates two stereo ADC that can support a stereo microphone, and feature Acoustic Echo Cancellation (AEC), Beam Forming (BF), and Noise Suppression (NS) for voice applications. |
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