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SN74LS76N データシート PDF ( Data ) |
| 番号 | 部品番号 | 部品説明 | メーカ | |
| 20 | SN74LS724 | Voltage Controlled Oscillator www.Datasheet.jp DataShee DataSheet4U.com DataSheet4U.com DataSheet 4 U .com www.Datasheet.jp et4U.com DataShee DataSheet4U.com DataSheet4U.com DataSheet 4 U .com www.Datasheet.jp |
 Motorola Semiconductor |
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| 19 | SN74LS73A | DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP The SN54LS / 74LS73A offers individual J, K, clear, and clock inputs. These dual flip-flops are designed so that when the clock goes HIGH, the inputs are enab |
 Motorola |
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| 18 | SN74LS73A | Dual J-K Flip-Flops With Clear |
 Texas Instruments |
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| 17 | SN74LS748 | 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS The SN54 / 74LS147 and the SN54/ 74LS148 are Priority Encoders. They provide priority decoding of the inputs to ensure that only the highest o |
Motorola |
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