PI6LC4840 PDF Datasheet

PI6LC4840 Crystal to LVDS/LVCMOS Frequency Synthesizer Features ÎÎ3.3V supply voltage ± 5% ÎÎThree banks of outputs: àà Bank A: 3 25/50MHz pin selectable LVCMOS outputs àà Bank B: 3 125MHz LVCMOS outputs àà Bank C: 3 125MHz LVDS outputs ÎÎ1 25MHz LVCMOS reference clock output (no PLL) ÎÎ25MHz crystal input (SaRonix-eCera P/N FL2500029) ÎÎLow 1ps max 12k-20MHz

PI6LC4820 HiFlexTM Ethernet Network Clock Generator Features ÎÎ3.3V supply voltage ÎÎCrystal input: 25 MHz ÎÎDifferential input: 25MHz, 156.25 MHz ÎÎOutput frequencies of 312.5, 156.25, 125MHz supported ÎÎ9 LVPECL or LVDS bank selectable outputs ÎÎLow 1ps max integra

PI6LC4830 HiFlexTM Network Clock Generator Features ÎÎ3.3V supply voltage ÎÎ3 HCSL and 1 LVCMOS 100MHz outputs with OE/ function ÎÎ1 LVCMOS 100/50MHz selectable ÎÎ25MHz crystal or differential input ÎÎLow 1ps RMS max integrated phase noise design ÎÎPLL Bypass mode fo

Features ÎÎ 2.5/3.3V supply voltage ÎÎ4 HCSL 100/125/200/250MHz outputs with OE ÎÎ2 LVCMOS 33/50/66/100MHz selectable outputs ÎÎ5 LVCMOS 25MHz or 125MHz outputs ÎÎ1 LVPECL 312.5MHz, 156.25MHz or 125MHz output ÎÎ1 CMOS 156.25MHz or 125MHz output ÎÎ1 LVPECL 125MHz or

Features ÎÎSingle LVCMOS output ÎÎSupports 125MHz or 130MHz output frequencies ÎÎRMS phase jitter @ 125MHz, using a 25MHz crystal (1.875MHz – 20MHz): 0.15ps (typical) ÎÎRMS phase jitter @ 125MHz, using a 25MHz crystal (12kHz – 20MHz): 0.33ps (typical) ÎÎFull 3.3V

PI6LC48C51 Ethernet / SATA LVCMOS Clock Generator Features ÎÎSingle LVCMOS output ÎÎSupports 70MHz - 170MHz output frequency range ÎÎRMS phase jitter @ 155.52MHz, (1.875MHz – 20MHz): 0.2ps (typical) ÎÎFull 3.3V or 2.5V supply modes ÎÎIndustrial ambient operating temp