HD74HC131 データシート PDFこの部品の機能は「3-to-8-line Decoder/demultiplexer With Edge-triggered Address Registers」です。 |
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部品番号 |
HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register. Address se Hitachi Semiconductor |
文字列「 HD74HC131 」「 74HC131 」で始まる検索結果です。 |
部品説明 |
74131 1-of-8 inverting decoder/demultiplexer with address register 74131 1-of-8 inverting decoder/demultiplexer with address register. +----------+ S0 |1 +--+ 16| VCC S1 |2 15| /Y0 S2 |3 CLK |4 14| /Y1 74 13| /Y2 /EN2 |5 131 12| /Y3 EN1 |6 11| /Y4 /Y7 |7 GND |8 10| /Y5 9| /Y6 +----------+ ETC |
74HC131 3-to-8-line Decoder/Demultiplexer HD74HC131 3-to-8-line Decoder/Demultiplexer with Edge-Triggered Address Registers Description The HD74HC131 is 3-to-8 linedecoder. It has Address select inputs (A,B,C) and D type register. Address select data store to D type registers, during the positive going transition of the Hitachi Semiconductor |
M74HC131 3 TO 8 LINE DECODER/LATCH M54HC131 M74HC131 3 TO 8 LINE DECODER/LATCH . . . . . . . . HIGH SPEED tPD = 22 ns (TYP.) AT VCC = 5 V LOW POWER DISSIPATION ICC = 4 µA (MAX.) at TA = 25 °C HIGH NOISE IMMUNITY VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY 10 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE | ST Microelectronics |
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