ERF216B1 データシート PDFこの部品の機能は「Diode ( Rectifier )」です。 |
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部品番号 |
ERF216B1 Diode ( Rectifier ) American Microsemiconductor |
ERF216B1 3 AMP ENCAPSULATED ASSEMBLIES http://www.Datasheet.jp/ datasheet pdf - http://www.Datasheet.jp/ Microsemi |
文字列「 ERF216B1 」「 216B1 」で始まる検索結果です。 |
部品説明 |
2SD2161 Silicon NPN Power Transistor INCHANGE Semiconductor isc Silicon NPN Darlington Power Transistor Product Specification 2SD2161 DESCRIPTION ·Collector-Emitter Breakdown Voltage- : V(BR)CEO= 100V(Min) ·High DC Current Gain- : hFE= 2000(Min)@ (VCE= 2V, IC= 2A) ·Low Collector Saturation Voltage- : VCE(sat)= Inchange Semiconductor |
2SD2161 NPN Silicon Transistor DATA SHEET SILICON POWER TRANSISTOR 2SD2161 NPN SILICON EPITAXIAL TRANSISTOR (DARLINGTON CONNECTION) FOR LOW-FREQUENCY POWER AMPLIFIERS AND LOW-SPEED SWITCHING The 2SD2161 is a Darlington power transistor that can directly drive from the IC output. This tr NEC |
2SK2161 Very High-Speed Switching Applications Ordering number:ENN4601A N-Channel Silicon MOSFET 2SK2161 Ultrahigh-Speed Switching Applications Features · Low ON resistance. · Ultrahigh-speed switching. · Low-voltage drive. · Micaless package facilitating mounting. Package Dimensions unit:mm 2063A [ Sanyo Semicon Device |
ADSP-2161 DSP Microcomputers with ROM a ADSP-2100 Family DSP Microcomputers ADSP-21xx SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifte Analog Devices |
ADSP-2161 ADSP-2100 Family DSP Microcomputers a ADSP-2100 Family DSP Microcomputers ADSP-21xx SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifte Analog Devices |
ADSP-2161 ADSP-2100 Family DSP Microcomputers a ADSP-2100 Family DSP Microcomputers ADSP-21xx SUMMARY 16-Bit Fixed-Point DSP Microprocessors with On-Chip Memory Enhanced Harvard Architecture for Three-Bus Performance: Instruction Bus & Dual Data Buses Independent Computation Units: ALU, Multiplier/ Accumulator, and Shifte Analog Devices |
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