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Datasheet DFPMU Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | |
3 | DFPMU | Floating Point Coprocessor DFPMU
Floating Point Coprocessor ver 2.05
OVERVIEW
DFPMU is a technology independent design that can be implemented in a variety of process technologies.
DFPMU is a Floating Point Coprocessor, designed to assist CPU in performing the floating point mathematic computations. DFPM |
Digital Core Design |
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2 | DFPMU-DP | Floating Point Coprocessor Double Precision DFPMU-DP
Floating Point Coprocessor Double Precision ver 3.03
OVERVIEW
allows save silicon space and provides exact configuration required by certain application. DFPMU-DP is a technology independent design that can be implemented in a variety of process technologies.
DFPMU-DP |
Digital Core Design |
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1 | DFPMUL | Floating Point Pipelined Multiplier Unit DFPMUL
Floating Point Pipelined Multiplier Unit ver 2.70
OVERVIEW
● Fully synthesizable, static synchronous design with no internal tri-states
The DFPMUL uses the pipelined mathematics algorithm to multiply two arguments. The input numbers format is according to IEEE754 stand |
Digital Core Design |
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