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Datasheet CY7C1371D Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 2 | CY7C1371D | 18-Mbit (512 K x 36/1 M x 18) Flow-Through SRAM CY7C1371D CY7C1373D
18-Mbit (512 K × 36/1 M × 18) Flow-Through SRAM with NoBL™ Architecture
18-Mbit (512 K × 36/1 M × 18) Flow-through SRAM with NoBL™ Architecture
Features
■ No Bus Latency (NoBL) architecture eliminates dead cycles between write and read cycles
■ Supports up to 1 |
 Cypress Semiconductor |
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| 1 | CY7C1371DV25 | (CY7C1371DV25 / CY7C1373DV25) Flow-Through SRAM CY7C1371DV25 CY7C1373DV25
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL™ Architecture
Features
• No Bus Latency™ (NoBL™) architecture eliminates dead cycles between write and read cycles • Can support up to 133-MHz bus operations with zero wait states — Dat |
Cypress Semiconductor |
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