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CD74HCT138 データシート PDF

この部品の機能は「High-speed Cmos LogIC 3- To 8-line Decoder/ Demultiplexer Inverting And Noninverting」です。


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部品番号
CD74HCT138

High-Speed CMOS Logic 3- to 8-Line Decoder/ Demultiplexer Inverting and Noninverting



Texas Instruments
Texas Instruments

データシート pdf



文字列「 CD74HCT138 」「 74HCT138 」で始まる検索結果です。

部品説明

74138

LOW POWER SCHOTTKY

SN74LS138 1-of-8 Decoder/ Demultiplexer The LSTTL / MSI SN74LS138 is a high speed 1-of-8 Decoder / Demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expansion to a 1-of-24 decoder usi

ON Semiconductor
ON Semiconductor

 データシート pdf


74138

Decoder/Demultiplexer

DM74LS138 • DM74LS139 Decoder/Demultiplexer August 1986 Revised March 2000 DM74LS138 • DM74LS139 Decoder/Demultiplexer General Description These Schottky-clamped circuits are designed to be used in high-performance memory-decoding or data-routing applications, requiring ver

Fairchild Semiconductor
Fairchild Semiconductor

 データシート pdf


74HCT138

3-to-8 line decoder/demultiplexer inverting

INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT138 3-to-8 line d

Philips
Philips

 データシート pdf


74HCT138

3-to-8 line decoder/demultiplexer

74HC138; 74HCT138 3-to-8 line decoder/demultiplexer; inverting Rev. 6 — 28 December 2015 Product data sheet 1. General description The 74HC138; 74HCT138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The device fe

NXP Semiconductors
NXP Semiconductors

 データシート pdf


74HCT138

3 TO 8 LINE DECODER DEMULTIPLEXER

74HCT138 3 TO 8 LINE DECODER DEMULTIPLEXER Description The 74HCT138 is a high speed CMOS device that is designed to be pin compatable with 74LS low power Schottky types. Pin Assignments The device accepts a three bit binary weighted address on input pins A0, A1 and A2 and when

Diodes
Diodes

 データシート pdf


HD74HCT138

3-to-8-line Decoder/Demultiplexer

HD74HCT138 3-to-8-line Decoder/Demultiplexer Description The HD74HCT138 has 3 binary select inputs (A, B, and C). If the device is enabled these inputs determine which one of the eight normally high outputs will go low. Two active low and one active high enables (G1, G2A and G2B

Hitachi Semiconductor
Hitachi Semiconductor

 データシート pdf

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