74LCX11MTC データシート PDFこの部品の機能は「Low Voltage Triple 3-input And Gate With 5v Tolerant Inputs」です。 |
検索結果を表示する |
部品番号 |
74LCX11MTC Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs April 1995 Revised March 1999 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description The LCX11 is Fairchild Semiconductor |
文字列「 74LCX11 」「 74LCX11MTC 」で始まる検索結果です。 |
部品説明 |
74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs April 1995 Revised March 1999 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for l Fairchild Semiconductor |
74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 Revised March 1999 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX112 is a dual J-K flip-flop. Each flip-flop ha Fairchild Semiconductor |
74LCX112M Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 Revised March 1999 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX112 is a dual J-K flip-flop. Each flip-flop ha Fairchild Semiconductor |
74LCX112MTC Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 Revised March 1999 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX112 is a dual J-K flip-flop. Each flip-flop ha Fairchild Semiconductor |
74LCX112SJ Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs June 1998 Revised March 1999 74LCX112 Low Voltage Dual J-K Negative Edge-Triggered Flip-Flop with 5V Tolerant Inputs General Description The LCX112 is a dual J-K flip-flop. Each flip-flop ha Fairchild Semiconductor |
74LCX11M Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs April 1995 Revised March 1999 74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs General Description The LCX11 is a triple 3-input AND gate with buffered outputs. LCX devices are designed for l Fairchild Semiconductor |
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