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Datasheet 74AUP2G125 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 2 | 74AUP2G125 | DUAL 3-STATE BUFFER NEW PRODUCT
74AUP2G125
DUAL 3-STATE BUFFER
Description
Pin Assignments
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP2G125 is a dual 3-State Buffer. Each buffer has an individual output enable pin while |
 Diodes |
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| 1 | 74AUP2G125 | Low-power dual buffer/line driver 74AUP2G125
Low-power dual buffer/line driver; 3-state
Rev. 10 — 8 February 2013
Product data sheet
1. General description
The 74AUP2G125 provides the dual non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (nOE). A HIGH level at pin |
 NXP Semiconductors |
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