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Datasheet 74AUP2G00 Equivalent ( PDF ) |
N.º | Número de pieza | Descripción | Fabricantes | |
2 | 74AUP2G00 | Low-power dual 2-input NAND gate 74AUP2G00
Low-power dual 2-input NAND gate
Rev. 8 — 5 February 2013
Product data sheet
1. General description
The 74AUP2G00 provides dual 2-input NAND function.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall times across the entire VCC range from 0. |
NXP Semiconductors |
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1 | 74AUP2G00 | DUAL NAND GATE NEW PRODUCT
74AUP2G00
DUAL NAND GATE
Description
Pin Assignments
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP2G00 is a dual two input NAND gate. Both gates have push-pull outputs designed for operatio |
Diodes |
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Número de pieza | Descripción | Fabricantes | |
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