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Datasheet 74AUP1G32 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 3 | 74AUP1G32 | Low-power 2-input OR gate
74AUP1G32
Low-power 2-input OR gate
Rev. 01 — 2 August 2005 Product data sheet
1. General description
The 74AUP1G32 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all inputs |
 NXP Semiconductors |
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| 2 | 74AUP1G32 | SINGLE 2 INPUT POSITIVE OR GATE 74AUP1G32
SINGLE 2 INPUT POSITIVE OR GATE
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
The 74AUP1G32 is a single, two-input, positive OR gate with a standard push-pull output designed for operation ove |
 Diodes |
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| 1 | 74AUP1G3208 | Low Power 3-Input OR-AND Gate
74AUP1G3208
Low-power 3-input OR-AND gate
Rev. 01 — 29 November 2006 Product data sheet
1. General description
The 74AUP1G3208 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt trigger action at |
NXP Semiconductors |
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