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Datasheet 74AUP1G00 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | |
| 2 | 74AUP1G00 | Low-power 2-input NAND gate
74AUP1G00
Low-power 2-input NAND gate
Rev. 02 — 29 June 2006 Product data sheet
1. General description
The 74AUP1G00 is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Schmitt-trigger action at all input |
 NXP Semiconductors |
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| 1 | 74AUP1G00 | SINGLE 2 INPUT POSITIVE NAND GATE 74AUP1G00
SINGLE 2 INPUT POSITIVE NAND GATE
Description
The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.
Pin Assignments
The 74AUP1G00 is a single two-input positive NAND gate with a standard push-pull output design |
 Diodes |
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