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PDF STL70N4LLF5 Data sheet ( Hoja de datos )
| Número de pieza | STL70N4LLF5 | |
| Descripción | N-channel Power MOSFET | |
| Fabricantes | STMicroelectronics | |
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Features
STL70N4LLF5
N-channel 40 V, 0.0055 Ω, 18 A, PowerFLAT™ (6x5)
STripFET™ V Power MOSFET
Preliminary Data
Type
STL70N4LLF5
VDSS
40 V
RDS(on)
max
0.0065 Ω
ID
18 A (1)
1. The value is rated according Rthj-pcb
■ RDS(on) * Qg industry benchmark
■ Extremely low on-resistance RDS(on)
■ High avalanche ruggedness
■ Low gate drive power losses
Application
■ Switching applications
Description
This product utilizes the 5th generation of design
rules of ST’s proprietary STripFET™ technology.
The lowest available RDS(on)*Qg, in this chip scale
package, makes this device suitable for the most
demanding DC-DC converter applications, where
high power density is to be achieved.
PowerFLAT™ ( 6x5 )
Figure 1. Internal schematic diagram
Table 1. Device summary
Order code
STL70N4LLF5
Marking
70N4LLF5
Package
PowerFLAT™ (6x5)
Packaging
Tape and reel
December 2008
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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STL70N4LLF5
Electrical characteristics
Table 7.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
VDD=15 V, ID= 9A,
RG=4.7 Ω, VGS=10 V
(see Figure 2)
Min. Typ. Max. Unit
TBD
TBD
TBD
TBD
ns
ns
ns
ns
Table 8. Source drain diode
Symbol
Parameter
Test conditions
ISD Source-drain current
ISDM(1) Source-drain current (pulsed)
VSD(2) Forward on voltage
ISD = 18A, VGS=0
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 18A,
di/dt = 100 A/µs,
VDD= 25 V
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration=300µs, duty cycle 1.5%
Min Typ. Max Unit
18 A
72 A
1.1 V
TBD
TBD
TBD
ns
nC
A
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