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LTC1968 の電気的特性と機能

LTC1968のメーカーはLinearです、この部品の機能は「RMS-to-DC Converter」です。


製品の詳細 ( Datasheet PDF )

部品番号 LTC1968
部品説明 RMS-to-DC Converter
メーカ Linear
ロゴ Linear ロゴ 




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LTC1968 Datasheet, LTC1968 PDF,ピン配置, 機能
LTC1968
Precision Wide Bandwidth,
RMS-to-DC Converter
FEATURES
High Linearity:
0.02% Linearity Allows Simple System Calibration
Wide Input Bandwidth:
Bandwidth to 1% Additional Gain Error: 500kHz
Bandwidth to 0.1% Additional Gain Error: 150kHz
3dB Bandwidth Independent of Input Voltage
Amplitude
No-Hassle Simplicity:
True RMS-DC Conversion with Only One External
Capacitor
Delta Sigma Conversion Technology
Ultralow Shutdown Current:
0.1µA
Flexible Inputs:
Differential or Single Ended
Rail-to-Rail Common Mode Voltage Range
Up to 1VPEAK Differential Voltage
Flexible Output:
Rail-to-Rail Output
Separate Output Reference Pin Allows Level Shifting
Small Size:
Space Saving 8-Pin MSOP Package
U
APPLICATIO S
True RMS Digital Multimeters and Panel Meters
True RMS AC + DC Measurements
DESCRIPTIO
The LTC®1968 is a true RMS-to-DC converter that uses an
innovative delta-sigma computational technique. The ben-
efits of the LTC1968 proprietary architecture, when com-
pared to conventional log-antilog RMS-to-DC converters,
are higher linearity and accuracy, bandwidth independent
of amplitude and improved temperature behavior.
The LTC1968 operates with single-ended or differential in-
put signals and accurately supports crest factors up to 4.
Common mode input range is rail-to-rail. Differential in-
put range is 1VPEAK, and offers unprecedented linearity. The
LTC1968 allows hassle-free system calibration at any in-
put voltage.
The LTC1968 has a rail-to-rail output with a separate out-
put reference pin providing flexible level shifting; it oper-
ates on a single power supply from 4.5V to 5.5V. A low power
shutdown mode reduces supply current to 0.1µA.
The LTC1968 is packaged in the space-saving MSOP pack-
age, which is ideal for portable applications.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Protected under U.S. Patent Numbers 6,359,576, 6,362,677 and 6,516,291
TYPICAL APPLICATIO
Single Supply RMS-to-DC Converter
4.5V TO 5.5V
DIFFERENTIAL
INPUT
0.1µF
OPT. AC
COUPLING
V+
IN1 OUTPUT
LTC1968
IN2 OUT RTN
EN GND
1968 TA01
CAVE
10µF
+
VOUT
Linearity Performance
0.2
LTC1968, ∆Σ
0
–0.2
–0.4
–0.6 CONVENTIONAL
LOG/ANTILOG
–0.8
60Hz SINEWAVE
–1.0
0 100 200
300
VIN (mV ACRMS)
400 500
1968 TA01b
1968f
1

1 Page





LTC1968 pdf, ピン配列
LTC1968
ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C. V+ = 5V, VOUTRTN = 2.5V, CAVE = 10µF, VIN = 200mVRMS, VENABLE = 0.5V
unless otherwise noted.
SYMBOL
PARAMETER
Output Characteristics
OVR Output Voltage Range
ZOUT
CMRRO
Output Impedance
Output Common Mode Rejection
VOMAX
Maximum Differential Output Swing
PSRRO
Power Supply Rejection
Frequency Response
f1P 1% Additional Gain Error (Note 15)
f– 3dB
±3dB Frequency (Note 15)
Power Supplies
V+ Supply Voltage
IS Supply Current
Shutdown Characteristics
ISS Supply Current
IIH ENABLE Pin Current High
IIL ENABLE Pin Current Low
VTH ENABLE Threshold Voltage
VHYS ENABLE Threshold Hysteresis
CONDITIONS
(Note 12)
(Note 13)
Accuracy = 1%, DC Input (Note 14)
(Note 9)
IN1 = 20mV, IN2 = 0V
IN1 = 200mV, IN2 = 0V
VENABLE = 4.5V
VENABLE = 4.5V
VENABLE = 0.5V
MIN TYP MAX
0
10
1.0
0.9
V+
12.5 16
50 250
1.05
250 1000
500
15
4.5
5.5
2.3 2.7
2.4
–1
–3
0.1 10
– 0.1
–0.5 – 0.1
2.1
0.1
UNITS
V
k
µV/V
V
V
µV/V
kHz
MHz
V
mA
mA
µA
µA
µA
V
V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The inputs (IN1, IN2) are protected by shunt diodes to GND and
V+. If the inputs are driven beyond the rails, the current should be limited
to less than 10mA.
Note 3: The LTC1968 output (VOUT) is high impedance and can be
overdriven, either sinking or sourcing current, to the limits stated.
Note 4: The LTC1968C/LTC1968I are guaranteed functional over the
operating temperature range of – 40°C to 85°C.
Note 5: The LTC1968C is guaranteed to meet specified performance from
0°C to 70°C. The LTC1968C is designed, characterized and expected to
meet specified performance from – 40°C to 85°C but is not tested nor QA
sampled at these temperatures. The LTC1968I is guaranteed to meet
specified performance from – 40°C to 85°C.
Note 6: High speed automatic testing cannot be performed with
CAVE = 10µF. The LTC1968 is 100% tested with CAVE = 47nF.
Note 7: The LTC1968 is 100% tested with DC and 10kHz input signals.
Measurements with DC inputs from 50mV to 350mV are used to calculate
the four parameters: GERR, VOOS, VIOS and linearity error. Correlation tests
have shown that the performance limits can be guaranteed with the
additional testing being performed to guarantee proper operation of all
internal circuitry.
Note 8: The LTC1968 is inherently very linear. Unlike older log/antilog
circuits, its behavior is the same with DC and AC inputs, and DC inputs are
used for high speed testing.
Note 9: The power supply rejections of the LTC1968 are measured with
DC inputs from 50mV to 350mV. The change in accuracy from V+ = 4.5V
to V+ = 5.5V is divided by 1V.
Note 10: Previous generation RMS-to-DC converters required nonlinear
input stages as well as a nonlinear core. Some parts specify a “DC reversal
error,” combining the effects of input nonlinearity and input offset voltage.
The LTC1968 behavior is simpler to characterize and the input offset
voltage is the only significant source of “DC reversal error.”
Note 11: Guaranteed by design.
Note 12: The LTC1968 is a switched capacitor device and the input/output
impedance is an average impedance over many clock cycles. The input
impedance will not necessarily lead to an attenuation of the input signal
measured. Refer to the Applications Information section titled “Input
Impedance” for more information.
Note 13: The common mode rejection ratios of the LTC1968 are measured
with DC inputs from 50mV to 350mV. The input CMRR is defined as the
change in VIOS measured with the input common mode voltage at 0V and
V+, divided by V+. The output CMRR is defined as the change in VOOS
measured with OUT RTN = 0V and OUT RTN = V+ – 350mV divided by
V+ – 350mV.
Note 14: The LTC1968 input and output voltage swings are limited by
internal clipping. However, its ∆Σ topology is relatively tolerant of
momentary internal clipping.
Note 15: The LTC1968 exploits oversampling and noise shaping to reduce
the quantization noise of internal 1-bit analog-to-digital conversions. At
higher input frequencies, increasingly large portions of this noise are
aliased down to DC. Because the noise is shifted in frequency, it becomes
a low frequency rumble and is only filtered at the expense of increasingly
long settling times. The LTC1968 is inherently wideband, but the output
accuracy is degraded by this aliased noise.
1968f
3


3Pages


LTC1968 電子部品, 半導体
LTC1968
TYPICAL PERFOR A CE CHARACTERISTICS
Bandwidth to 500kHz
202
0.5%/DIV
201
CAVE = 10µF
VIN = 200mVRMS
200
199
198
197
196
195
0
100 200 300 400
INPUT FREQUENCY (kHz)
500
1968 G14
Output Accuracy
vs Signal Amplitude
10
1% ERROR
VIN2 = MIDSUPPLY
5
0
–5
–1% ERROR
–10
–15
DC
AC – 60Hz
SINEWAVE
–20
0
0.5 1 1.5
VIN1 (VRMS)
2
1967 G17
DC Transfer Function Near Zero
40
VIN2 = MIDSUPPLY
35 THREE REPRESENTATIVE UNITS
30
25
20
15
10
5
0
–5
–10
–30 –20 –10
0
10 20 30
VIN1 (mV DC)
1968 G15
Output Noise vs Input Frequency
1
PEAK NOISE MEASURED
IN 10 SECOND PERIOD
CAVE = 1µF
0.1
CAVE = 10µF
CAVE = 100µF
0.01
0.001
10k
100k
INPUT FREQUENCY (Hz)
1M
1967 G18
Input Common Mode Rejection
Ratio vs Frequency
90
80
70
60
50
40
30
20 4.5V COMMON
MODE INPUT
10 CONVERSION
TO DC OUTPUT
0
10 100 1k
10k 100k
INPUT FREQUENCY (Hz)
1M
10M
1967 G16
Output Noise vs Device
1
LTC1966
CAVE = 1µF
0.1
LTC1967
CAVE = 1.5µF
LTC1968
CAVE = 6.8µF
0.01
1k
10k 100k 1M
INPUT FREQUENCY (Hz) 1968 G19
AVE CAPACITOR CHOSEN FOR EACH DEVICE
TO GIVE A 1 SECOND, 0.1% SETTLING TIME
1968f
6

6 Page



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