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PDF COP8SDR9HLQ8 Data sheet ( Hoja de datos )
| Número de pieza | COP8SDR9HLQ8 | |
| Descripción | 8-Bit CMOS Flash Based Microcontroller with 32k Memory/ Virtual EEPROM and Brownout | |
| Fabricantes | National Semiconductor | |
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August 2003
COP8SBR9/COP8SCR9/COP8SDR9
8-Bit CMOS Flash Based Microcontroller with 32k
Memory, Virtual EEPROM and Brownout
1.0 General Description
The COP8SBR9/SCR9/SDR9 Flash based microcontrollers
are highly integrated COP8™ Feature core devices, with 32k
Flash memory and advanced features including Virtual EE-
PROM, High Speed Timers, USART, and Brownout Reset.
This single-chip CMOS device is suited for applications re-
quiring a full featured, in-system reprogrammable controller
with large memory and low EMI. The same device is used for
development, pre-production and volume production with a
range of COP8 software and hardware development tools.
Devices included in this datasheet:
Device
Flash Program
Memory
(bytes)
RAM
(bytes)
COP8SBR9
32k
1k
COP8SCR9
32k
1k
COP8SDR9
32k
1k
Brownout
Voltage
2.7V to 2.9V
4.17V to 4.5V
No Brownout
I/O
Pins
Packages
37,39,49,
59
37,39,49,
59
37,39,49,
59
44 LLP,
44/68 PLCC,
48/56 TSSOP
44 LLP,
44/68 PLCC,
48/56 TSSOP
44 LLP,
44/68 PLCC,
48/56 TSSOP
Temperature
−40˚C to +85˚C
−40˚C to +85˚C
−40˚C to +125˚C
−40˚C to +85˚C
−40˚C to +125˚C
2.0 Features
KEY FEATURES
n 32 kbytes Flash Program Memory with Security Feature
n Virtual EEPROM using Flash Program Memory
n 1 kbyte volatile RAM
n USART with on chip baud generator
n 2.7V–5.5V In-System Programmability of Flash
n High endurance - 100k Read/Write Cycles
n Superior data retention - 100 years
n Dual Clock Operation with HALT/IDLE Power Save
Modes
n Three 16-bit timers:
— Timers T2 and T3 can operate at high speed (50 ns
resolution)
— Processor Independent PWM mode
— External Event counter mode
— Input Capture mode
n Brown-out Reset (COP8SBR9/SCR9)
OTHER FEATURES
n Single supply operation: 2.7V–5.5V
n Quiet Design (low radiated emissions)
n Multi-Input Wake-up with optional interrupts
n MICROWIRE/PLUS (Serial Peripheral Interface
Compatible)
n Clock Doubler for 20 MHz operation from 10 MHz
Oscillator, with 0.5 µs Instruction Cycle
n Thirteen multi-source vectored interrupts servicing:
— External Interrupt
— USART (2)
— Idle Timer T0
— Three Timers (each with 2 interrupts)
— MICROWIRE/PLUS Serial peripheral interface
— Multi-Input Wake-Up
— Software Trap
n Idle Timer with programmable interrupt interval
n 8-bit Stack Pointer SP (stack in RAM)
n Two 8-bit Register Indirect Data Memory Pointers
n True bit manipulation
n WATCHDOG and Clock Monitor logic
n Software selectable I/O options
— TRI-STATE® Output/High Impedance Input
— Push-Pull Output
— Weak Pull Up Input
n Schmitt trigger inputs on I/O ports
n High Current I/Os
n Temperature range: –40˚C to +85˚C and –40˚C to
+125˚C (COP8SCR9/SDR9)
n Packaging: 44 and 68 PLCC, 44 LLP, 48 and 56 TSSOP
n True In-System, Real time emulation and debug offered
by MetaLink’s Development Systemstools available
COP8™ is a trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation DS101389
www.national.com
1 page  
Table of Contents (Continued)
16.1 CLOCK MONITOR ................................................................................................................................ 57
16.2 WATCHDOG/CLOCK MONITOR OPERATION .................................................................................... 57
16.3 WATCHDOG AND CLOCK MONITOR SUMMARY .............................................................................. 58
16.4 DETECTION OF ILLEGAL CONDITIONS ............................................................................................ 58
17.0 MICROWIRE/PLUS .................................................................................................................................. 59
17.1 MICROWIRE/PLUS OPERATION ......................................................................................................... 59
17.1.1 MICROWIRE/PLUS Master Mode Operation .................................................................................. 59
17.1.2 MICROWIRE/PLUS Slave Mode Operation .................................................................................... 59
17.1.2.1 Alternate SK Phase Operation and SK Idle Polarity ................................................................. 60
18.0 Memory Map ............................................................................................................................................ 62
19.0 Instruction Set .......................................................................................................................................... 64
19.1 INTRODUCTION ................................................................................................................................... 64
19.2 INSTRUCTION FEATURES .................................................................................................................. 64
19.3 ADDRESSING MODES ......................................................................................................................... 64
19.3.1 Operand Addressing Modes ............................................................................................................ 64
19.3.2 Tranfer-of-Control Addressing Modes .............................................................................................. 65
19.4 INSTRUCTION TYPES ......................................................................................................................... 66
19.4.1 Arithmetic Instructions ...................................................................................................................... 66
19.4.2 Transfer-of-Control Instructions ....................................................................................................... 66
19.4.3 Load and Exchange Instructions ..................................................................................................... 66
19.4.4 Logical Instructions .......................................................................................................................... 66
19.4.5 Accumulator Bit Manipulation Instructions ....................................................................................... 66
19.4.6 Stack Control Instructions ................................................................................................................ 66
19.4.7 Memory Bit Manipulation Instructions ............................................................................................. 66
19.4.8 Conditional Instructions ................................................................................................................... 66
19.4.9 No-Operation Instruction .................................................................................................................. 66
19.5 REGISTER AND SYMBOL DEFINITION .............................................................................................. 67
19.6 INSTRUCTION SET SUMMARY .......................................................................................................... 67
19.7 INSTRUCTION EXECUTION TIME ...................................................................................................... 69
20.0 Development Support .............................................................................................................................. 71
20.1 TOOLS ORDERING NUMBERS FOR THE COP8 FLASH FAMILY DEVICES ................................... 71
20.2 COP8 TOOLS OVERVIEW ................................................................................................................... 73
20.3 WHERE TO GET TOOLS ..................................................................................................................... 74
21.0 Revision History ....................................................................................................................................... 76
22.0 Physical Dimensions ................................................................................................................................ 79
5 www.national.com
5 Page 
6.0 Architectural Overview (Continued)
examples. In many cases, the instruction set can simulta-
neously execute as many as three functions with the same
single-byte instruction.
JID: (Jump Indirect); Single byte instruction decodes exter-
nal events and jumps to corresponding service routines
(analogous to “DO CASE” statements in higher level lan-
guages).
LAID: (Load Accumulator-Indirect); Single byte look up table
instruction provides efficient data path from the program
memory to the CPU. This instruction can be used for table
lookup and to read the entire program memory for checksum
calculations.
RETSK: (Return Skip); Single byte instruction allows return
from subroutine and skips next instruction. Decision to
branch can be made in the subroutine itself, saving code.
AUTOINC/DEC: (Auto-Increment/Auto-Decrement); These
instructions use the two memory pointers B and X to effi-
ciently process a block of data (simplifying “FOR NEXT” or
other loop structures in higher level languages).
6.6.4 Bit-Level Control
Bit-level control over many of the microcontroller’s I/O ports
provides a flexible means to ease layout concerns and save
board space. All members of the COP8 family provide the
ability to set, reset and test any individual bit in the data
memory address space, including memory-mapped I/O ports
and associated registers.
6.6.5 Register Set
Three memory-mapped pointers handle register indirect ad-
dressing and software stack pointer functions. The memory
data pointers allow the option of post-incrementing or post-
decrementing with the data movement instructions (LOAD/
EXCHANGE). And 15 memory-mapped registers allow de-
signers to optimize the precise implementation of certain
specific instructions.
6.7 PACKAGING/PIN EFFICIENCY
Real estate and board configuration considerations demand
maximum space and pin efficiency, particularly given today’s
high integration and small product form factors. Microcon-
troller users try to avoid using large packages to get the I/O
needed. Large packages take valuable board space and
increase device cost, two trade-offs that microcontroller de-
signs can ill afford.
The COP8 family offers a wide range of packages and does
not waste pins.
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| Páginas | Total 70 Páginas | |
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