COP8CDR9HLQ8 Datasheet PDF - National Semiconductor
| Part Number | COP8CDR9HLQ8 | |
| Description | 8-Bit CMOS Flash Microcontroller with 32k Memory/ Virtual EEPROM/ 10-Bit A/D and Brownout | |
| Manufacturers | National Semiconductor | |
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August 2003
COP8CBR9/COP8CCR9/COP8CDR9
8-Bit CMOS Flash Microcontroller with 32k Memory,
Virtual EEPROM, 10-Bit A/D and Brownout
1.0 General Description
The COP8CBR/CCR/CDR9 Flash microcontrollers are
highly integrated COP8™ Feature core devices, with 32k
Flash memory and advanced features including Virtual EE-
PROM, A/D, High Speed Timers, USART, and Brownout
Reset. This single-chip CMOS device is suited for applica-
tions requiring a full featured, in-system reprogrammable
controller with large memory and low EMI. The same device
is used for development, pre-production and volume produc-
tion with a range of COP8 software and hardware develop-
ment tools.
Device included in this datasheet:
Device
COP8CBR9
COP8CCR9
COP8CDR9
Flash Program
Memory
(bytes)
32k
32k
32k
RAM
(bytes)
1k
1k
1k
Brownout
Voltage
I/O
Pins
37,39,49,
2.7V to 2.9V
59
37,39,49,
4.17V to 4.5V
59
37,39,49,
No Brownout
59
Packages
44 LLP,
44/68 PLCC,
48/56 TSSOP
44 LLP,
44/68 PLCC,
48/56 TSSOP
44 LLP,
44/68 PLCC,
48/56 TSSOP
Temperature
−40˚C to +85˚C
−40˚C to +85˚C
−40˚C to +125˚C
−40˚C to +85˚C
−40˚C to +125˚C
2.0 Features
KEY FEATURES
n 32 kbytes Flash Program Memory with Security Feature
n Virtual EEPROM using Flash Program Memory
n 1 kbyte volatile RAM
n 10-bit Successive Approximation Analog to Digital
Converter (up to 16 channels)
n 100% Precise Analog Emulation
n USART with onchip baud generator
n 2.7V – 5.5V In-System Programmability of Flash
n High endurance -100k Read/Write Cycles
n Superior Data Retention - 100 years
n Dual Clock Operation with HALT/IDLE Power Save
Modes
n Three 16-bit timers:
— Timers T2 and T3 can operate at high speed (50 ns
resolution)
— Processor Independent PWM mode
— External Event counter mode
— Input Capture mode
n Brown-out Reset (COP8CBR9/CCR9)
OTHER FEATURES
n Single supply operation:
— 2.7V–5.5V (−40˚C to +85˚C)
— 4.5V–5.5V (−40˚C to +125˚C)
n Quiet Design (low radiated emissions)
n Multi-Input Wake-up with optional interrupts
n MICROWIRE/PLUS (Serial Peripheral Interface
Compatible)
n Clock Doubler for 20 MHz operation from 10 MHz
Oscillator, with 0.5 µs Instruction Cycle
n Thirteen multi-source vectored interrupts servicing:
— External Interrupt
— USART (2)
— Idle Timer T0
— Three Timers (each with 2 interrupts)
— MICROWIRE/PLUS Serial peripheral interface
— Multi-Input Wake-up
— Software Trap
n Idle Timer with programmable interrupt interval
n 8-bit Stack Pointer SP (stack in RAM)
n Two 8-bit Register Indirect Data Memory Pointers
n True bit manipulation
n WATCHDOG and Clock Monitor logic
n Software selectable I/O options
— TRI-STATE® Output/High Impedance Input
— Push-Pull Output
— Weak Pull Up Input
n Schmitt trigger inputs on I/O ports
n High Current I/Os
n Temperature range: –40˚C to +85˚C and –40˚C to
+125˚C (COP8CCR9/CDR9)
n Packaging: 44 and 68 PLCC, 44 LLP, 48 and 56 TSSOP
n True In-System, real time emulation and debug tools
available
COP8™ is a trademark of National Semiconductor Corporation.
© 2003 National Semiconductor Corporation DS101374
www.national.com
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Table of Contents (Continued)
15.3 ANALOG INPUT AND SOURCE RESISTANCE CONSIDERATIONS .................................................. 55
16.0 Interrupts .................................................................................................................................................. 56
16.1 INTRODUCTION ................................................................................................................................... 56
16.2 MASKABLE INTERRUPTS ................................................................................................................... 56
16.3 VIS INSTRUCTION ............................................................................................................................... 57
16.3.1 VIS Execution .................................................................................................................................. 58
16.4 NON-MASKABLE INTERRUPT ............................................................................................................ 59
16.4.1 Pending Flag .................................................................................................................................... 59
16.4.2 Software Trap .................................................................................................................................. 59
16.4.2.1 Programming Example: External Interrupt ................................................................................. 60
16.5 PORT L INTERRUPTS .......................................................................................................................... 61
16.6 INTERRUPT SUMMARY ....................................................................................................................... 61
17.0 WATCHDOG/Clock Monitor ..................................................................................................................... 61
17.1 CLOCK MONITOR ................................................................................................................................ 62
17.2 WATCHDOG/CLOCK MONITOR OPERATION .................................................................................... 62
17.3 WATCHDOG AND CLOCK MONITOR SUMMARY .............................................................................. 63
17.4 DETECTION OF ILLEGAL CONDITIONS ............................................................................................ 63
18.0 MICROWIRE/PLUS .................................................................................................................................. 63
18.1 MICROWIRE/PLUS OPERATION ......................................................................................................... 64
18.1.1 MICROWIRE/PLUS Master Mode Operation .................................................................................. 64
18.1.2 MICROWIRE/PLUS Slave Mode Operation .................................................................................... 64
18.1.2.1 Alternate SK Phase Operation and SK Idle Polarity ................................................................. 65
19.0 Memory Map ............................................................................................................................................ 66
20.0 Instruction Set .......................................................................................................................................... 67
20.1 INTRODUCTION ................................................................................................................................... 67
20.2 INSTRUCTION FEATURES .................................................................................................................. 67
20.3 ADDRESSING MODES ......................................................................................................................... 68
20.3.1 Operand Addressing Modes ............................................................................................................ 68
20.3.2 Tranfer-of-Control Addressing Modes .............................................................................................. 69
20.4 INSTRUCTION TYPES ......................................................................................................................... 69
20.4.1 Arithmetic Instructions ...................................................................................................................... 70
20.4.2 Transfer-of-Control Instructions ....................................................................................................... 70
20.4.3 Load and Exchange Instructions ..................................................................................................... 70
20.4.4 Logical Instructions .......................................................................................................................... 70
20.4.5 Accumulator Bit Manipulation Instructions ....................................................................................... 70
20.4.6 Stack Control Instructions ................................................................................................................ 70
20.4.7 Memory Bit Manipulation Instructions ............................................................................................. 70
20.4.8 Conditional Instructions ................................................................................................................... 70
20.4.9 No-Operation Instruction .................................................................................................................. 70
20.5 REGISTER AND SYMBOL DEFINITION .............................................................................................. 70
20.6 INSTRUCTION SET SUMMARY .......................................................................................................... 72
20.7 INSTRUCTION EXECUTION TIME ...................................................................................................... 73
21.0 Development Support .............................................................................................................................. 76
21.1 TOOLS ORDERING NUMBERS FOR THE COP8 FLASH FAMILY DEVICES ................................... 76
21.2 COP8 TOOLS OVERVIEW ................................................................................................................... 78
21.3 WHERE TO GET TOOLS ..................................................................................................................... 79
22.0 Revision History ....................................................................................................................................... 80
23.0 Physical Dimensions ................................................................................................................................ 83
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