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LTC2377-18 データシート PDF ( 特性, スペック, ピン接続図 )

部品番号 LTC2377-18
部品説明 Low Power SAR ADC
メーカ Linear
ロゴ Linear ロゴ 

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LTC2377-18 Datasheet, LTC2377-18 PDF,ピン配置, 機能
FEATURES
n 500ksps Throughput Rate
n ±1.75LSB INL (Max)
n Guaranteed 18-Bit No Missing Codes
n Low Power: 6.8mW at 500ksps, 6.8μW at 500sps
n 102dB SNR (Typ) at fIN = 2kHz
n 124dB THD (Typ) at fIN = 2kHz
n Digital Gain Compression (DGC)
n Guaranteed Operation to 125°C
n 2.5V Supply
n Fully Differential Input Range ±VREF
n VREF Input Range from 2.5V to 5.1V
n No Pipeline Delay, No Cycle Latency
n 1.8V to 5V I/O Voltages
n SPI-Compatible Serial I/O with Daisy-Chain Mode
n Internal Conversion Clock
n 16-Lead MSOP and 4mm × 3mm DFN Packages
APPLICATIONS
n Medical Imaging
n High Speed Data Acquisition
n Portable or Compact Instrumentation
n Industrial Process Control
n Low Power Battery-Operated Instrumentation
n ATE
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
LTC2377-18
18-Bit, 500ksps, Low Power
SAR ADC with 102dB SNR
DESCRIPTION
The LTC®2377-18 is a low noise, low power, high speed
18-bit successive approximation register (SAR) ADC.
Operating from a 2.5V supply, the LTC2377-18 has a
±VREF fully differential input range with VREF ranging from
2.5V to 5.1V. The LTC2377-18 consumes only 6.8mW and
achieves ±1.75LSB INL maximum, no missing codes at
18 bits with 102dB SNR.
The LTC2377-18 has a high speed SPI-compatible se-
rial interface that supports 1.8V, 2.5V, 3.3V and 5V logic
while also featuring a daisy-chain mode. The fast 500ksps
throughput with no cycle latency makes the LTC2377-18
ideally suited for a wide variety of high speed applications.
An internal oscillator sets the conversion time, easing exter-
nal timing considerations. The LTC2377-18 automatically
powers down between conversions, leading to reduced
power dissipation that scales with the sampling rate.
The LTC2377-18 features a unique digital gain compres-
sion (DGC) function, which eliminates the driver amplifier’s
negative supply while preserving the full resolution of the
ADC. When enabled, the ADC performs a digital scaling
function that maps zero-scale code from 0V to 0.1 • VREF
and full-scale code from VREF to 0.9 • VREF. For a typical
reference voltage of 5V, the full-scale input range is now
0.5V to 4.5V, which provides adequate headroom for
powering the driving amplifier from a single 5.5V supply.
TYPICAL APPLICATION
2.5V 1.8V TO 5V
10μF
0.1μF
VREF
0V
VREF
0V
+
20Ω
6800pF
VDD OVDD CHAIN
IN+ RDL/SDI
SDO
3300pF
LTC2377-18
SCK
20Ω
IN
6800pF
REF
BUSY
CNV
GND REF/DGC
2.5V TO 5.1V
237718 TA01
47μF
(X5R, 0805 SIZE)
SAMPLE CLOCK
VREF
32k Point FFT fS = 500ksps, fIN = 2kHz
0
SNR = 102.3dB
–20 THD = –124dB
SINAD = 102.2dB
–40 SFDR = 125dB
–60
–80
–100
–120
–140
–160
–180
0
50 100 150 200 250
FREQUENCY (kHz)
237718 TA02
237718f
1

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