|
|
HD74HC640のメーカーはRenesasです、この部品の機能は「Octal Bus Transceivers」です。 |
部品番号 | HD74HC640 |
| |
部品説明 | Octal Bus Transceivers | ||
メーカ | Renesas | ||
ロゴ | |||
このページの下部にプレビューとHD74HC640ダウンロード(pdfファイル)リンクがあります。 Total 11 pages
HD74HC640, HD74HC643
Octal Bus Transceivers (with 3-state outputs)
REJ03D0637-0200
(Previous ADE-205-517)
Rev.2.00
Mar 30, 2006
Description
Each device has an active enable G and a direction control input, DIR. When DIR is high, data flows from the A inputs
to the B outputs. When DIR is low, data flows from the B inputs to the A outputs. The HD74HC640 transfers inverted
data from one bus to other and the HD74HC643 transfers inverted data from the A bus to the B bus and true data from
the B bus to the A bus.
Features
• High Speed Operation: tpd = 12 ns typ (CL = 50 pF)
• High Output Current: Fanout of 15 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC640P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
HD74HC640FPEL SOP-20 pin (JEITA)
PRSP0020DD-B
(FP-20DAV)
FP
HD74HC640RPEL
SOP-20 pin (JEDEC)
HD74HC643RPEL
PRSP0020DC-A RP
(FP-20DBV)
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
—
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
Function Table
Control Inputs
G DIR
LL
LH
HX
H : high level
L : low level
X : irrelevant
HD74HC640
B data to A bus
A data to B bus
Isolation
Operation
HD74HC643
B data to A bus
A data to B bus
Isolation
Rev.2.00 Mar 30, 2006 page 1 of 10
1 Page HD74HC640, HD74HC643
Logic Diagram
HD74HC640
G
DIR
A
VCC
VCC
B
HD74HC643
G
DIR
A
To 7 Other
Inverters
To 7 Other
Inverters
VCC
VCC
B
To 7 Other
Inverters
To 7 Other
Inverters
Rev.2.00 Mar 30, 2006 page 3 of 10
3Pages HD74HC640, HD74HC643
HD74HC643
VCC
VCC
Input
Pulse Generator
Zout = 50 Ω
Input
Pulse Generator
Zout = 50 Ω
G
DIR
S1
A1
B1
Output
1 kΩ S2
CL =
50 pF
OPEN
GND
VCC
TEST
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S2
OPEN
GND
VCC
Notes : 1. CL includes probe and jig capacitance.
2. A2–B2, A3–B3, A4–B4, A5–B5, A6–B6, A7–B7, A8–B8 are identical to above load circuit.
3. S1 is a input / output swich.
Rev.2.00 Mar 30, 2006 page 6 of 10
6 Page | |||
ページ | 合計 : 11 ページ | ||
|
PDF ダウンロード | [ HD74HC640 データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HD74HC640 | Octal Bus Transceivers (with 3-state outputs) | Hitachi Semiconductor |
HD74HC640 | Octal Bus Transceivers | Renesas |
HD74HC643 | Octal Bus Transceivers (with 3-state outputs) | Hitachi Semiconductor |
HD74HC643 | Octal Bus Transceivers | Renesas |