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HD74HC573 の電気的特性と機能

HD74HC573のメーカーはRenesasです、この部品の機能は「Octal Transparent Latches」です。


製品の詳細 ( Datasheet PDF )

部品番号 HD74HC573
部品説明 Octal Transparent Latches
メーカ Renesas
ロゴ Renesas ロゴ 




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HD74HC573 Datasheet, HD74HC573 PDF,ピン配置, 機能
HD74HC563, HD74HC573
Octal Transparent Latches (with 3-state outputs)
REJ03D0629-0200
(Previous ADE-205-509)
Rev.2.00
Mar 30, 2006
Description
When the latch enable (LE) input is high, the Q outputs of HD74HC563 will follow the inversion of the D inputs and
the Q outputs of HD74HC573 will follow the D inputs. When the latch enable goes low, data at the D inputs will be
retained at the outputs until latch enable returns high again. When a high logic level is applied to the output control
input, all outputs go to a high impedance state, regardless of what signals are present at the other inputs and the state of
the storage elements.
Features
High Speed Operation: tpd (Data to Q, Q) = 11 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
HD74HC563P
HD74HC573P
DILP-20 pin
PRDP0020AC-B
(DP-20NEV)
P
HD74HC563FPEL
SOP-20 pin (JEITA)
HD74HC573FPEL
PRSP0020DD-B
(FP-20DAV)
FP
HD74HC563RPEL
SOP-20 pin (JEDEC)
HD74HC573RPEL
PRSP0020DC-A
(FP-20DBV)
RP
HD74HC573TELL TSSOP-20 pin
PTSP0020JB-A
(TTP-20DAV)
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (1,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
Outputs
Output Control
Latch Enable
Data
HD74HC563
HD74HC573
L HH L H
LHLHL
L L X Q0 Q0
HXXZ Z
Q0 : level of Q before the indicated Steady-sate input conditions were established.
Q0 : complement of Q0 or level of Q before the indicated Steady-state input conditions were established.
Rev.2.00 Mar 30, 2006 page 1 of 10

1 Page





HD74HC573 pdf, ピン配列
HD74HC563, HD74HC573
Logic Diagram
HD74HC563
1D
2D
3D
4D
5D
6D
7D
8D
LE
OC
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
D
CQ
C
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
Rev.2.00 Mar 30, 2006 page 3 of 10


3Pages


HD74HC573 電子部品, 半導体
HD74HC563, HD74HC573
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Item
Propagation delay
time
Output enable
time
Output disable
time
Setup time
Hold time
Pulse width
Output rise/fall
time
Input capacitance
Symbol VCC (V)
tPLH 2.0
tPHL 4.5
6.0
tPLH 2.0
tPHL 4.5
6.0
tZH 2.0
tZL 4.5
6.0
tHZ 2.0
tLZ 4.5
6.0
tsu 2.0
4.5
6.0
th 2.0
4.5
6.0
tw 2.0
4.5
6.0
tTLH 2.0
tTHL 4.5
6.0
Cin —
Ta = 25°C
Min Typ Max
— — 110
— 11 22
— — 19
— — 115
— 13 23
— — 20
— — 150
— 14 30
— — 26
— — 150
— 15 30
— — 26
75 — —
15 2 —
13 — —
5 ——
5 –1 —
5 ——
80 — —
16 4 —
14 — —
— — 60
— 4 12
— — 10
— 5 10
Ta = –40 to +85°C
Min Max Unit
Test Conditions
— 140 ns Data to Q
— 28
— 24
— 145 ns Clock to Q
— 29
— 25
— 190 ns
— 38
— 33
— 190 ns
— 38
— 33
90 — ns
19 —
16 —
5 — ns
5—
5—
100 — ns
20 —
17 —
— 75 ns
— 15
— 13
— 10 pF
Test Circuit
VCC
Input
Pulse Generator
Zout = 50
Input
Pulse Generator
Zout = 50
VCC
Output
OC 1Q to 8Q
or
1Q to 8Q
1D to 8D
LE
1 k S1
CL =
50 pF
OPEN
GND
VCC
TEST
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
OPEN
GND
VCC
Note : 1. CL includes probe and jig capacitance.
Rev.2.00 Mar 30, 2006 page 6 of 10

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
HD74HC573

Octal Transparent Latches (with 3-state outputs)

Hitachi Semiconductor
Hitachi Semiconductor
HD74HC573

Octal Transparent Latches

Renesas
Renesas
HD74HC574

Octal D-type Flip-Flops (with 3-state outputs)

Hitachi Semiconductor
Hitachi Semiconductor
HD74HC574

Octal D-type Flip-Flops

Renesas
Renesas


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