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PDF LTC3408 Data sheet ( Hoja de datos )
| Número de pieza | LTC3408 | |
| Descripción | Synchronous Step-Down Regulator | |
| Fabricantes | Linear | |
| Logotipo |  |
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LTC3408
1.5MHz, 600mA
Synchronous Step-Down
Regulator with Bypass Transistor
FEATURES
■ Dynamically Adjustable Output from 0.3V to 3.5V
■ 600mA Output Current
■ Internal 0.08Ω P-Channel MOSFET Bypass
Transistor
■ High Efficiency: Up to 96%
■ 1.5MHz Constant Frequency Operation
■ No Schottky Diode Required
■ Low Dropout Operation: 100% Duty Cycle
■ 2.5V to 5V Input Voltage Range
■ Shutdown Mode Draws < 1µA Supply Current
■ Current Mode Operation for Excellent Line and
Load Transient Response
■ Overtemperature Protected
■ Available in 8-Lead 3mm × 3mm DFN Package
U
APPLICATIO S
■ WCDMA Cell Phone Power Amplifiers
■ Wireless Modems
DESCRIPTIO
The LTC®3408 is a high efficiency monolithic synchro-
nous buck regulator optimized for WCDMA power ampli-
fier applications. The output voltage can be dynamically
programmed from 0.3V to 3.5V. At VOUT > 3.6V an internal
0.08Ω bypass P-channel MOSFET connects VOUT directly
to VIN, eliminating power loss through the inductor.
The input voltage range is 2.5V to 5V making the LTC3408
ideally suited for single Li-Ion battery-powered applica-
tions. 100% duty cycle provides low dropout operation,
extending battery life in portable systems.
Switching frequency is internally set at 1.5MHz, allowing
the use of small surface mount inductors and capacitors.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode.
The LTC3408 is available in a low profile (0.75mm) 8-lead
3mm × 3mm DFN package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U.S. Patent Numbers: 5481178, 6580258, 6304066, 6127815, 6498466, 6611131
TYPICAL APPLICATIO
WCDMA Transmitter Power Supply
VIN
2.7V
TO 5V
OUTPUT
PROGRAMMING
DAC
CIN†
10µF
CER
VIN SW
LTC3408
RUN VOUT
REF
GND
4.7µH*
*MURATA LQH32CN4R7M11
**TAIYO YUDEN JMK212BJ475MG
†TAIYO YUDEN JMK212BJ106MN
COUT**
4.7µF
CER
VOUT
3× VREF
600mA
WCDMA
RF PA
3403 TA01
Efficiency Power Lost vs Load Current
1 100
90
80
70
0.1
60
50
0.01
0.01
1
40
30
VOUT = 1.2V
VOUT = 1.5V
20
VOUT = 1.8V 10
VOUT = 2.5V
0
10 100 1000
LOAD CURRENT (mA)
3408 F04
3408f
1
1 page  
TYPICAL PERFOR A CE CHARACTERISTICS (From Figure 1)
LTC3408
Output Ripple Waveform
Load Step Response
VOUT
10mV/DIV
IL
100mA/DIV
VIN = 3.6V
VREF = 0.6V
ILOAD = 0A
200ns/DIV
REF Transient
VREF
0.5V/DIV
3408 G16
VOUT
1V/DIV
VIN = 4.2V
40µs/DIV
VREF = 0V TO 1.4V
RLOAD = 5Ω
3408 G18
VOUT
100mV/DIV
IL
500mA/DIV
ILOAD
500mA/DIV
VIN = 3.6V
20µs/DIV
VREF = 0.6V
ILOAD = 0mA TO 600mA
3408 G17
VOUT vs VREF
4.5
VIN = 4.2V
4.0
3.5
IL = 100mA
IL = 600mA
3.0
2.5
2.0
1.5
1.0
0.5
0
0 0.5 1.0
VREF (V)
1.5
3408 G19
PI FU CTIO S
VOUT (Pins 1, 8): Output Voltage Feedback Pin. An internal
resistive divider divides the output voltage down by 3 for
comparison to the external reference voltage. The drain of
the P-channel bypass MOSFET is connected to this pin.
VIN (Pins 2, 7): Main Supply Pin. Must be closely de-
coupled to GND, Pin 3, with a 10µF or greater ceramic
capacitor.
GND (Pin 3): Ground Pin.
SW (Pin 4): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
RUN (Pin 5): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
REF (Pin 6): External Reference Input. Controls the output
voltage to 3× the applied voltage at REF. Also turns on the
bypass MOSFET when VREF > 1.2V.
Exposed Pad (Pin 9): Connect to GND, Pin 3.
3408f
5
5 Page 
LTC3408
APPLICATIO S I FOR ATIO
dissipate (0.531A)2 • 0.08Ω = 22.6mW. Thus, TJ = 70°C +
(0.0143 + 0.0425)(43) = 71.1°C.
Reductions in power dissipation occur at higher supply
voltages, where the junction temperature is lower due to
reduced switch resistance (RDS(ON)).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to (ILOAD • ESR), where ESR is the effective series
resistance of COUT. ILOAD also begins to charge or dis-
charge COUT, which generates a feedback error signal. The
regulator loop then acts to return VOUT to its steady state
value. During this recovery time VOUT can be monitored for
overshoot or ringing that would indicate a stability prob-
lem. For a detailed explanation of switching control loop
theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
VIN
CIN
1
VOUT
2 VIN
VOUT
VIN
8
7
3
GND
4
SW
6
REF
5
RUN
LTC3408
COUT
VOUT
RREF
CREF
DAC
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3408. These items are also illustrated graphically in
Figures 5 and 6. Check the following in your layout:
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and wide.
2. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC drive to the
internal power MOSFETs.
3. Keep the (–) plates of CIN and COUT as close as possible.
Design Example
As a design example, assume the LTC3408 is used in a
single lithium-ion battery-powered cellular phone applica-
tion. The VIN will be operating from a maximum of 4.2V
down to about 2.7V. The load current requirement is a
maximum of 0.6A but most of the time it will be in standby
mode, requiring only 2mA. Efficiency at both low and high
load currents is important. Output voltage is 2.5V. With
this information we can calculate L using Equation (1),
L
=
1
(f)(∆IL
)
VOUT
1–
VOUT
VIN
(2)
TO DAC
RREF
VIA TO REF
CIN
VIA TO PIN 7
VIA TO PIN 8
COUT
VIA TO PIN 1
VOUT 1
VIN 2
GND 3
SW 4
LTC3408
8 VOUT
7 VIN
6 REF
5 RUN
VIA TO PIN 2
CREF
3403 F05
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 5. Layout Diagram
L1 VIA TO VIN VIA TO GND
3408 F06
Figure 6. Suggested Layout
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
3408f
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LTC3408.PDF ] | |
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