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Número de pieza | HD74LV10A | |
Descripción | Triple 3-input Positive NAND Gates | |
Fabricantes | Renesas | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74LV10A (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
No Preview Available ! HD74LV10A
Triple 3-input Positive NAND Gates
REJ03D0233–0300Z
(Previous ADE-205-251A (Z))
Rev.3.00
May 24, 2004
Description
The HD74LV10A performs the Boolean functions Y = A•B•C or Y = A+B+C in positive logic.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
HD74LV10AFPEL
SOP–14 pin(JEITA) FP–14DAV
FP
HD74LV10ARPEL
SOP–14 pin(JEDEC) FP–14DNV
RP
HD74LV10ATELL
TSSOP–14 pin
TTP–14DV
T
Note: Please consult the sales office for the above package availability.
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
EL (2,500 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
Inputs
A B C Output Y
HHHL
L XXH
XL XH
XXL H
Note: H: High level
L: Low level
X: Immaterial
Rev.3.00, May 24, 2004, page 1 of 1
1 page HD74LV10A
Operating Characteristics
Item
Symbol
Power dissipation capacitance CPD
VCC (V)
3.3
5.0
Ta = 25°C
Min Typ
— 9.5
— 11.0
Max
—
—
CL = 50 pF
Unit Test Conditions
pF f = 10 MHz
Noise Characteristics
Item
Quiet output, maximum
dynamic VOL
Quiet output, minimum
dynamic VOL
Quiet output, minimum
dynamic VOH
High-level dynamic input
voltage
Low-level dynamic inout
voltage
Symbol
VOL (P)
VCC (V)
3.3
Ta = 25°C
Min Typ
— 0.2
VOL (V)
3.3
—
–0.1
VOH (V)
3.3
—
3.2
VIH (D)
3.3
2.31 —
VIL (D)
3.3
—
—
Max
0.8
–0.8
—
—
0.99
CL = 50 pF
Unit Test Conditions
V
V
Test Circuit
Measurement point
CL*
Note: CL includes the probe and jig capacitance.
Rev.3.00, May 24, 2004, page 5 of 7
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet HD74LV10A.PDF ] |
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