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HD74LV02AのメーカーはRenesasです、この部品の機能は「2-input NOR Gates」です。 |
部品番号 | HD74LV02A |
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部品説明 | 2-input NOR Gates | ||
メーカ | Renesas | ||
ロゴ | |||
このページの下部にプレビューとHD74LV02Aダウンロード(pdfファイル)リンクがあります。 Total 8 pages
HD74LV02A
Quad. 2-input NOR Gates
REJ03D0226–0300Z
(Previous ADE-205-241A (Z))
Rev.3.00
May 21, 2004
Description
The HD74LV02A has four two-input NOR gates in a 14-pin package.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the
low-power consumption extends the battery life.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current
±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• Ordering Information
Part Name
Package Type
Package Code
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74LV02AFPEL
SOP–14 pin(JEITA) FP–14DAV
FP
EL (2,000 pcs/reel)
HD74LV02ARPEL
SOP–14 pin(JEDEC) FP–14DNV
RP
EL (2,500 pcs/reel)
HD74LV02ATELL
TSSOP–14 pin
TTP–14DV
T
ELL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs
A
H
X
L
Note: H: High level
L: Low level
X: Immaterial
B
X
H
L
Output Y
L
L
H
Rev.3.00, May 21, 2004, page 1 of 7
1 Page HD74LV02A
Recommended Operating Conditions
Item
Symbol Min
Supply voltage range
Input voltage range
Output voltage range
Output current
VCC 2.0
VI 0
VO 0
IOH —
—
—
—
IOL —
—
—
—
Input transition rise or fall rate
∆t/∆v
0
0
0
Operating free-air temperature
Ta
–40
Note: Unused or floating inputs must be held high or low.
Max
5.5
5.5
VCC
–50
–2
–6
–12
50
2
6
12
200
100
20
85
Logic Diagram
A
B
Unit
V
V
V
µA
mA
µA
mA
ns/V
°C
Conditions
VCC = 2.0 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.0 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
VCC = 2.3 to 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 to 5.5 V
Y
Rev.3.00, May 21, 2004, page 3 of 7
3Pages HD74LV02A
• Waveform − 1
Input
tr
10%
90%
50% VCC
tPLH
tf
90%
50% VCC
10%
tPHL
In phase output
tPHL
50% VCC
50% VCC
tPLH
Out of phase output
50% VCC
50% VCC
VCC
0V
VOH
VOL
VOH
VOL
Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns
2. The output are measured one at a time with one transition per measurement.
Package Dimensions
10.06
10.5 Max
14
8
As of January, 2003
Unit: mm
17
1.42 Max
1.27
*0.40 ± 0.06
*Ni/Pd/Au plating
0.15
0.12 M
7.80
+
–
0.20
0.30
1.15
0.70 ± 0.20
0˚ – 8˚
Package Code
JEDEC
JEITA
Mass (reference value)
FP-14DAV
—
Conforms
0.23 g
Rev.3.00, May 21, 2004, page 6 of 7
6 Page | |||
ページ | 合計 : 8 ページ | ||
|
PDF ダウンロード | [ HD74LV02A データシート.PDF ] |
データシートを活用すると、その部品の主な機能と仕様を詳しく理解できます。 ピン構成、電気的特性、動作パラメータ、性能を確認してください。 |
部品番号 | 部品説明 | メーカ |
HD74LV02A | Quad. 2-input NOR Gates | Hitachi Semiconductor |
HD74LV02A | 2-input NOR Gates | Renesas |