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IRF7580MTRPBFのメーカーはInternational Rectifierです、この部品の機能は「Power MOSFET ( Transistor )」です。 |
部品番号 | IRF7580MTRPBF |
| |
部品説明 | Power MOSFET ( Transistor ) | ||
メーカ | International Rectifier | ||
ロゴ | |||
このページの下部にプレビューとIRF7580MTRPBFダウンロード(pdfファイル)リンクがあります。 Total 12 pages
Application
Brushed motor drive applications
BLDC motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC inverters
Benefits
Improved gate, avalanche and dynamic dv/dt ruggedness
Fully characterized capacitance and avalanche SOA
Enhanced body diode dv/dt and di/dt capability
Lead-free, RoHS compliant
StrongIRFET™
IRF7580MTRPbF
DirectFET® N-Channel Power MOSFET
VDSS
RDS(on) typ.
max
ID
60V
2.9m
3.6m
114A
S
SS
S
DD
G SS
DirectFET®
ME ISOMETRIC
Base part number
IRF7580MPbF
Package Type
DirectFET® ME
Standard Pack
Form
Quantity
Tape and Reel
4800
Orderable Part Number
IRF7580MTRPbF
8.0
ID = 70A
7.0
6.0
5.0 TJ = 125°C
4.0
3.0
2.0
1.0
4
TJ = 25°C
6 8 10 12 14 16 18 20
VGS, Gate -to -Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
120
110
100
90
80
70
60
50
40
30
20
10
0
25
50 75 100 125
TC , Case Temperature (°C)
150
Fig 2. Maximum Drain Current vs. Case Temperature
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1 Page IRF7580MTRPbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
gfs Forward Transconductance
Qg Total Gate Charge
Qgs Gate-to-Source Charge
Qgd Gate-to-Drain ("Miller") Charge
Qsync
Total Gate Charge Sync. (Qg - Qgd)
td(on)
Turn-On Delay Time
tr Rise Time
td(off)
Turn-Off Delay Time
tf Fall Time
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
Coss eff. (ER) Effective Output Capacitance (Energy Related)
Coss eff. (TR) Effective Output Capacitance (Time Related)
Min. Typ. Max. Units
Conditions
190 ––– ––– S VDS = 10V, ID = 70A
––– 120 180
ID = 70A
–––
–––
32
36
–––
–––
nC
VDS =30V
VGS = 10V
––– 84 –––
––– 20 –––
––– 38 –––
––– 53 –––
––– 21 –––
––– 6510 –––
––– 610 –––
––– 360 –––
––– 620 –––
VDD = 30V
ns
ID = 30A
RG = 2.7
VGS = 10V
VGS = 0V
VDS = 25V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 48V
––– 770 –––
VGS = 0V, VDS = 0V to 48V
Diode Characteristics
Symbol
Parameter
IS Continuous Source Current
(Body Diode)
ISM Pulsed Source Current
(Body Diode)
VSD Diode Forward Voltage
Min. Typ. Max. Units
Conditions
––– ––– 105 A MOSFET symbol
D
showing the
––– ––– 460
integral reverse
G
p-n junction diode.
S
––– ––– 1.2 V TJ= 25°C,IS = 70A, VGS = 0V
dv/dt
trr
Qrr
IRRM
Peak Diode Recovery
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
––– 4.1 ––– V/ns TJ =150°C,IS =70A, VDS = 60V
––– 41 ––– ns TJ = 25° C VR = 51V,
––– 44 –––
TJ = 125°C IF = 70A
––– 55 ––– nC TJ = 25°C di/dt = 100A/µs
––– 71 –––
TJ = 125°C
––– 2.5 ––– A TJ = 25°C
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJ max, starting TJ = 25°C, L = 34µH
RG = 50, IAS = 70A, VGS =10V.
ISD ≤ 70A, di/dt ≤ 980A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the
same charging time as Coss while VDS is rising from 0
to 80% VDSS.
Coss eff. (ER) is a fixed capacitance that gives the
same energy as Coss while VDS is rising from 0 to
80% VDSS.
When mounted on 1" square PCB (FR-4 or G-10
Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
R is measured at TJ approximately 90°C.
Limited by TJ max, starting TJ = 25°C, L= 1mH, RG = 50,
IAS = 17A, VGS =10V.
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3Pages 10
IRF7580MTRPbF
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.001
1E-006
SINGLE PULSE
( THERMAL RESPONSE )
1E-005
0.0001
0.001
t1 , Rectangular Pulse Duration (sec)
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01 0.1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Allowed avalanche Current vs avalanche
100
pulsewidth, tav, assuming Tj = 125°C and
Tstart =25°C (Single Pulse)
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 125°C.
0.1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
Fig 15. Avalanche Current vs. Pulse Width
100
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
80 ID = 70A
60
40
20
0
25 50 75 100 125 150
Starting TJ , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
Iav = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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May 14, 2015
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IRF7580MTRPBF | Power MOSFET ( Transistor ) | International Rectifier |