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PDF LTC6360 Data sheet ( Hoja de datos )

Número de pieza LTC6360
Descripción Very Low Noise Single-Ended SAR ADC Driver
Fabricantes Linear 
Logotipo Linear Logotipo



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Features
n Output Swings to True Zero on Single Supply
n 2.3nV/√Hz Noise Density
n Fast Settling Time: 150ns, 16-Bit, 4V Step
n 110dB SNR in 3MHz Bandwidth
n Low Distortion, HD2 = –103dBc and HD3 = –109dBc
for 4VP-P Output at 40kHz
n Low Offset Voltage: 250µV Max
n Low Power Shutdown: 350µA Max
n 3mm × 3mm 8-Pin DFN and 8-lead MSOP Packages
Applications
n 16-Bit and 18-Bit SAR ADC Driver
n High Speed Buffer Amplifiers
n Low Noise Signal Processing
LTC6360
Very Low Noise Single-Ended
SAR ADC Driver
with True Zero Output
Description
The LTC®6360 is a very low noise, high precision, high
speed amplifier suitable for driving SAR ADCs. The
LTC6360 features a total output noise of 2.3nV/√Hz
combined with 150ns settling time to 16-bit levels (AV = 1).
While powered from a single 5V supply, the amplifier out-
put can swing to 0V while maintaining high linearity. This
is made possible with the inclusion of a very low noise
on-chip charge pump that generates a negative voltage
to bias the output stage of the amplifier, increasing the
allowable negative voltage swing.
The LTC6360 is available in a compact 3mm × 3mm,
8-pin leadless DFN package and an 8-pin MSOP package
with exposed pad and operates over a –40°C to 125°C
temperature range.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Typical Application
ADC Driver
0.1µF
1µF
5V
VIN
0V TO 4V
+–
+IN
SHDN CPI CPO
+ LTC6360 CHARGE
PUMP
GND
–IN
OUT VCC VDD
5V
5V
10Ω
330pF
0.1µF
RADC
10µF
ADC
6360 TA01a
Harmonic Distortion vs
Output Amplitude
–60
fIN = 20kHz
–70 VOUT = 0V TO VP-P
–80
–90
–100
–110
–120
HD2
–130
–140
0
HD3
1234
VOUT (VP-P)
5
6360 TA01b
6360f
1

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LTC6360 pdf
Electrical Characteristics
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Inputs are protected by back-to-back diodes and diodes to each
supply. If the inputs are taken beyond the supplies or the differential input
voltage exceeds 0.7V, the input current must be limited to less than 10mA.
Note 3: A heat sink may be required to keep the junction temperature
below the absolute maximum rating when the output is shorted
indefinitely.
Note 4: The LTC6360C/LTC6360I/LTC6360H are guaranteed functional over
the temperature range –40°C to 125°C.
Note 5: The LTC6360C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6360C is designed, characterized and expected to
LTC6360
meet specified performance from –40°C to 125°C, but are not tested or
QA sampled at these temperatures. The LTC6360I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6360H is guaranteed
to meet specified performance from –40°C to 125°C.
Note 6: DC linearity is calculated by measuring the output vs input voltage
and calculating the maximum deviation from the least squares best fit line
at 100mV increments.
Note 7: FPBW is determined from distortion performance with HD2, HD3
< –70dBc as the criteria for a valid output. FPBW is limited by the charge
pump current sinking capability. See text for details.
Note 8: ICPO(MAX) and RCPO are measured with CPO disconnected from
CPI and CPI driven by external –0.7V source.
T seye Fpigiucrea1 lfor Pcirecurit cfonofigruramtiona. nce Characteristics TA = 25°C, VCC = VDD = 5V, V+IN = 2V, VSHDN = 5V,
VOS Distribution, MS8E (PNP Stage)
80 440 TYPICAL UNITS
70 V+IN = 2V
60
50
40
30
20
10
0
–200 –150 –100 –50 0 50 100 150 200
INPUT OFFSET VOLTAGE (µV)
6360 G01
VOS Distribution, MS8E (NPN Stage)
80 440 TYPICAL UNITS
70 V+IN = 4V
60
50
40
30
20
10
0
–200 –150 –100 –50 0 50 100 150 200
INPUT OFFSET VOLTAGE (µV)
6360 G02
(∆PVNOPS
Distribution, MS8E
to NPN Stage)
80 440 TYPICAL UNITS
70 V+IN = 2V TO 4V
60
50
40
30
20
10
0
–200 –150 –100 –50 0 50 100 150 200
CHANGE IN INPUT OFFSET VOLTAGE (µV)
6360 G03
Offset Voltage vs Input Common
Mode Voltage
300
200
TA = –40°C
100
0 TA = 25°C
–100
–200
TA = 125°C
–300
–0.5 0.5 1.5 2.5 3.5 4.5
INPUT COMMON MODE VOLTAGE (V)
6360 G04
VOS vs Temperature
500
400
300
200
100 V+IN = 2V
0
–100
–200
–300
V+IN = 4V
–400
–500
–50 –25
0 25 50 75 100 125
TEMPERATURE (°C)
6360 G05
Input Bias Current vs Input
Common Mode Voltage
20
15
10
5
0
–5
–10
–15
–20
–25
–30 TA = 125°C
–35
–40
TA = 25°C
TA = –40°C
–1 0 1 2 3 4 5
INPUT COMMON MODE VOLTAGE (V)
6360 G06
6360f
5

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LTC6360 arduino
LTC6360
Operation
The LTC6360 is a low noise amplifier suitable for driving
single-ended high performance successive approximation
register (SAR) ADCs. The LTC6360 uses a single ampli-
fier with negative charge pump topology as shown in the
Block Diagram.
The output can swing from –0.48V to 4.91V. The ampli-
fier is designed to drive a series 10Ω resistor and 330pF
capacitor filter network to ground, although larger load
capacitances can be driven.
An on-chip low noise charge pump generates a small
negative voltage (typically –0.6V) at the CPO pin. This
negative voltage is normally connected to the amplifier’s
output stage via the CPI pin, allowing the output to swing
to true zero on a single 5V supply. Compared to typical
rail-to-rail output amplifiers that can only swing to within
a few hundred millivolts of ground, the LTC6360 provides
improved linearity and increased functionality for applica-
tions that benefit from a true zero output swing.
The LTC6360 features a low noise amplifier that can
support a signal-to-noise ratio of 110dB over a 3MHz
noise bandwidth.
Basic Connections
Shown in Figure 2 is a typical application for the LTC6360
as a unity gain driver. The amplifier’s two inputs (+IN and
–IN) can accommodate a voltage range of 0V to 4.25V on
4V
VIN
0V
0.1µF
1µF
5V
+–
VIN
0V TO 4V
+IN SHDN
CPI
LTC6360
+ CHARGE
PUMP
CPO
GND
–IN OUT VCC VDD
6360 F02
10Ω 0.1µF
5V
10µF
VOUT
330pF
4V
0V
Figure 2. Unity Gain Driver.
a single 5V rail. This provides a simple interface for 5V
ADCs with a 4.096V full-scale range.
Noninverting gain (shown in Figure 3) and inverting gain
(shown in Figure 4) configurations are also possible. For
best DC precision, RS should be made equal to the paral-
lel combination of RF and RG. RS can be bypassed with a
capacitor to reduce its noise contribution.
RS
+– VIN
RG
CS
5V
0.1µF
+IN SHDN
CPI
LTC6360
+ CHARGE
PUMP
CPO
GND
–IN
RF
CF
OUT
VCC
VDD
6360 F03
0.1µF
RFILT
VOUT
CFILT
1µF
5V
10µF
Figure 3. Noninverting Gain Configuration.
RS 5V
0.1µF
1µF
RG
+– VIN
+IN SHDN
CPI
LTC6360
+ CHARGE
PUMP
CPO
GND
–IN
RF
CF
OUT
VCC
VDD
6360 F04
0.1µF
RFILT
VOUT
CFILT
Figure 4. Inverting Gain Configuration
5V
10µF
6360f
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