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PDF IRS21171 Data sheet ( Hoja de datos )

Número de pieza IRS21171
Descripción SINGLE CHANNEL DRIVER
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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No Preview Available ! IRS21171 Hoja de datos, Descripción, Manual

February 18, 2009
IRS211(7,71,8)(S)
SINGLE CHANNEL DRIVER
IC Features
Floating channel designed for bootstrap
operation
Fully operational to +600V
Tolerant to negative transient voltage, dV/dt
immune
Gate drive supply range from 10 V to 20V
Undervoltage lockout
CMOS Schmitt-triggered inputs with pull-down
Output in phase with input
RoHS compliant
IRS2117 and IRS2118 available in PDIP8
Product Summary
Topology
VOFFSET
VOUT
IO+ & IO- (typical)
IN voltage IRS211(7,8)
threshold IRS21171
Package Type
Single High Side
600 V
10V-20 V
290 mA & 600 mA
9.5 V & 6 V
2.5 V & 0.8 V
SOIC8
PDIP8
IRS2117(1)
www.irf.com
IRS2118
© 2008 International Rectifier
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IRS21171 pdf
IRS211(7,71,8)(S)
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The thermal resistance and power
dissipation ratings are measured under board mounted and still air conditions.
Symbol
VB
VS
VHO
VCC
VIN
dVS/dt
PD
RθJA
TJ
TS
TL
Definition
High-side floating supply voltage
High-side floating supply offset voltage
High-side floating output voltage
Logic supply voltage
Logic input voltage
Allowable offset supply voltage transient (fig.2)
Package power dissipation @ TA +25˚C
Thermal Resistance, junction to Ambient
Junction temperature
8 lead SOIC
8 lead PDIP
8 lead SOIC
8 lead PDIP
Storage temperature
Lead Temperature (soldering, 10 seconds)
Min.
-0.3
VB - 25
VS - 0.3
- 0.3
- 0.3
---
---
---
---
-55
---
Max.
625
VB + 0.3
VB + 0.3
25
VCC + 0.3
50
0.625
1.0
200
125
150
150
300
Units
V
V/ns
W
ºC/W
ºC
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used
within the recommended conditions. The VS offset rating is tested with all supplies biased at 15 V
differential.
Symbol
Definition
Min.
Max.
Units
VB High-Side floating supply absolute voltage
VS + 10
VS + 20
VS High-side floating supply offset voltage
† 600
VST
VHO
Transient High side floating supply offset voltage
High-side floating output voltage
-50 (††)
VS
600
VB
V
VCC Logic supply voltage
10 20
VIN Logic input voltage
0 VCC
TA Ambient Temperature
-40 125 ºC
Logic operational for VS of -5 V to +600 V. Logic state held for VS of -5 V to – VBS.
†† Operational for transient negative VS of COM - 50 V with a 50 ns pulse width. Guaranteed by design.
Refer to the Application Information section of this datasheet for more details.
www.irf.com
© 2008 International Rectifier
5

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IRS21171 arduino
IRS211(7,71,8)(S)
Tolerant to Negative VS Transients
A common problem in today’s high-power switching converters is the transient response of the switch node’s
voltage as the power switches transition on and off quickly while carrying a large current. A typical half bridge
circuit is shown in Figure 5; here we define the power switches and diodes of the inverter.
If the high-side switch (e.g., Q1 in Figures 6 and 7) switches off, while the current is flowing to a load, a current
commutation occurs from high-side switch (Q1) to the diode (D2) in parallel with the low-side switch of the
inverter. At the same instance, the voltage node VS swings from the positive DC bus voltage to the negative
DC bus voltage.
DC+ BUS
Input
Voltage
Q1
D1
VS
Q2
To
Load
D2
DC- BUS
Figure 5: Half Bridge Circuit
DC+ BUS
Q1
OFF
VS
Q2
OFF
D1
IL
D2
Figure 6: Q1 conducting
DC- BUS
Figure 7: D2 conducting
Also when the current flows from the load back to the inverter (see Figures 8 and 9), and Q2 switches on, the
current commutation occurs from D1 to Q2. At the same instance, the voltage node VS swings from the positive
DC bus voltage to the negative DC bus voltage.
www.irf.com
© 2008 International Rectifier
11

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