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PDF UPD1002 Data sheet ( Hoja de datos )
| Número de pieza | UPD1002 | |
| Descripción | USB Power Delivery Controller | |
| Fabricantes | Microchip | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de UPD1002 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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UPD1002
USB Power Delivery Controller
Highlights
• Integrated USB Power Delivery (PD) PHY
• Support for Power Delivery Message Protocol
• Integrated Voltage and Current ADC Inputs
• Configuration Profile Selection
• On-chip Microcontroller
• SPI Interface
• Commercial and Industrial Grade Temperature
Support
• Available in 32-SQFN Package
Target Applications
• Notebooks
• Ultrabooks
• Desktop PCs
• Docking Stations
• Monitors
• Printers
Key Benefits
• Integrated USB Power Delivery (PD) PHY
- Integrated receive termination
- Requires minimal external components
• Support for Power Delivery Message Protocol
- Message Generation/Consumption
- Retry Generation
- Error Handling
- State Behavior
• Cable Detect Logic
- Cable attachment type
• CFG_SEL pins allow selection of multiple profiles
- Provider
- Provider/Consumer
- Consumer
- Consumer/Provider
• Integrated Voltage (VMON) and Current (IMON)
ADC Inputs
• Dead Battery Support
• On-chip Microcontroller
- Manages I/Os and other signals
- Implements power delivery policy engine and
device policy manager
• Configuration Programming via OTP, or Vendor
Defined Messaging
• Supports Low Power Modes
• Serial Peripheral Interface (SPI) Bus
• Internal 3.3 V and 1.8 V Voltage Regulators
• Integrated Oscillator Reduces BOM Costs
• Package
- 32-pin SQFN (5 x 5 mm)
• Environmental
- Commercial temperature range (0°C to +70°C)
- Industrial temperature range (-40°C to +85°C
2014 Microchip Technology Inc.
DS00001760B-page 1
1 page  
FIGURE 1-1:
INTERNAL BLOCK DIAGRAM
UPD1002
PD_ID
PD_DATA
Power
Delivery
AFE
Micro-
controller
Power
Delivery
MAC
SPI ROM
Controller
SPI ROM
VBUS
VTR
VMON
Voltage
Switch
Voltage
Monitor
I/O
Controller†
I/O
IMON Current
Monitor
Reset
Controller
RESET_N
CFG_SEL0
CFG_SEL1
Configuration
Select
Clocks
UPD1002
†Specific I/O functions are determined by package and CFG_SEL0/CFG_SEL1 profile selection.
2014 Microchip Technology Inc.
DS00001760B-page 5
5 Page 
UPD1002
FIGURE 2-3:
CONFIGURATION 32-CP_B SYSTEM-LEVEL DIAGRAM
VDDIO
CFG_SEL0
VDDIO
CFG_SEL1
VDDIO
FAULT_N
FAULT_IN_N
VSEL0_N
VSEL1_N
VSEL2_N
PD_EN
System Power
Filter
Cap
Bank
DC-to-DC
Power
Regulator
Dead
Battery
Standard
24V AC
Adapter
VSAFEDB_EN
Microchip VMON
UPD1002
VBUS
35.7k
5.1k
5V
32-SQFN
IMON
CSA
SPI_ROM_CLK
Configuration
32-CP_B
SPI_ROM_CE_N
VBUS_DISCHARGE
SPI_ROM_DI
SPI_ROM_DO
VDDIO
PD_DATA
Couple/Filter
PD_ID
VSAFEDB_EN
VSS
VBUS_OUT USB Hub
with BC1.2
USB
Power
VBUS Delivery
Enabled
ID Standard-B
D+ Receptacle
D-
GND
2014 Microchip Technology Inc.
DS00001760B-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet UPD1002.PDF ] | |
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