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USB3320 の電気的特性と機能

USB3320のメーカーはMicrochipです、この部品の機能は「Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver」です。


製品の詳細 ( Datasheet PDF )

部品番号 USB3320
部品説明 Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver
メーカ Microchip
ロゴ Microchip ロゴ 




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USB3320 Datasheet, USB3320 PDF,ピン配置, 機能
USB3320
Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI
Transceiver
Features
• Integrated ESD protection circuits
- Up to ±15kV IEC Air Discharge without exter-
nal devices
• Over-Voltage Protection circuit (OVP) protects the
VBUS pin from continuous DC voltages up to 30V
• Integrated USB Switch
- No degradation of Hi-Speed electrical char-
acteristics
- Allows single USB port of connection by pro-
viding switching function for:
–Battery charging
–Stereo and mono/mic audio
–USB Full-Speed/Low-Speed data
• flexPWR® Technology
- Low current design ideal for battery powered
applications
- “Sleep” mode tri-states all ULPI pins and
places the part in a low current state
- 1.8V to 3.3V IO Voltage (±10%)
• Integrated battery to 3.3V regulator
- 2.2uF bypass capacitor
- 100mV dropout voltage
• “Wrapper-less” design for optimal timing perfor-
mance and design ease
- Low Latency Hi-Speed Receiver (43 Hi-
Speed clocks Max) allows use of legacy
UTMI Links with a ULPI bridge
• Selectable Reference Clock Frequency
- Frequencies: 12, 13, 19.2, 24, 26, 27, 38.4,
52 or 60MHz - pin selectable
• External Reference Clock operation available
- ULPI Input Clock Mode (60MHz sourced by
Link)
- 0 to 3.6V input drive tolerant
- Able to accept “noisy” clock sources as refer-
ence to internal, low-jitter PLL
• Internal Oscillator operation available
• This mode requires external Quartz Crystal or
Ceramic Resonator
• Smart detection circuits allow identification of
USB charger, headset, or data cable insertion
• Includes full support for the optional On-The-Go
(OTG) protocol detailed in the On-The-Go Sup-
plement Revision 2.0 specification
• Supports Headset Audio Mode
• Supports the OTG Host Negotiation Protocol
(HNP) and Session Request Protocol (SRP)
• UART mode for non-USB serial data transfers
• Internal 5V cable short-circuit protection of ID, DP
and DM lines to VBUS or ground
• Industrial Operating Temperature -40°C to +85°C
• 32-pin, QFN RoHS Compliant Package
(5 x 5 x 0.90 mm height)
Applications
The USB3320 is targeted for any application where a
Hi-Speed USB connection is desired and when board
space, power, and interface pins must be minimized.
The USB3320 is well suited for:
• Networking
• Audio Video
• Medical
• Industrial Computers
• Printers
• Repeaters
• Communication
2014-2015 Microchip Technology Inc.
DS00001792B-page 1

1 Page





USB3320 pdf, ピン配列
USB3320
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 USB3320 Pin Locations and Definitions ......................................................................................................................................... 6
3.0 Limiting Values ................................................................................................................................................................................ 9
4.0 Electrical Characteristics ............................................................................................................................................................... 10
5.0 Architecture Overview ................................................................................................................................................................... 17
6.0 ULPI Operation ............................................................................................................................................................................. 33
7.0 ULPI Register Map ........................................................................................................................................................................ 49
8.0 Application Notes .......................................................................................................................................................................... 58
9.0 Package Information ..................................................................................................................................................................... 63
Appendix A: Data Sheet Revision History ........................................................................................................................................... 66
The Microchip Web Site ...................................................................................................................................................................... 67
Customer Change Notification Service ............................................................................................................................................... 67
Customer Support ............................................................................................................................................................................... 67
Product Identification System ............................................................................................................................................................. 68
2014-2015 Microchip Technology Inc.
DS00001792B-page 3


3Pages


USB3320 電子部品, 半導体
USB3320
2.0 USB3320 PIN LOCATIONS AND DEFINITIONS
2.1 USB3320 Pin Locations and Descriptions
2.1.1 PACKAGE DIAGRAM WITH PIN LOCATIONS
The illustration below is viewed from the top of the package.
FIGURE 2-1:
USB3320 PIN LOCATIONS - TOP VIEW
CLKOUT
NXT
DATA0
DATA1
DATA2
DATA3
DATA4
REFSEL0
1
2
3
4
5
6
7
8
HHi33-i-UUSU22SpLLSpPPePPeBiieIInne3dPPd3QQHHU0UFF0YYSNNSBB2
GND FLAG
24 RBIAS
23 ID
22 VBUS
21 VBAT
20 VDD33
19 DM
18 DP
17 CPEN
2.1.2 PIN DEFINITIONS
The following table details the pin definitions for the figure above.
TABLE 2-1:
Pin
1
USB3320 PIN DESCRIPTION
Name
CLKOUT
Direction/
Type
Output,
CMOS
2
NXT
Output,
CMOS
3
DATA[0]
I/O,
CMOS
Active
Level
N/A
Description
ULPI Output Clock Mode:
60MHz ULPI clock output. All ULPI signals
are driven synchronous to the rising edge
of this clock.
ULPI Input Clock Mode:
This pin is connected to VDDIO to
configure 60MHz ULPI Input Clock mode
as described in Section 5.4.1.
Following POR or hardware reset, the
voltage at CLKOUT must not exceed
VIH_ED as provided inTable 4-4.
High
N/A
The transceiver asserts NXT to throttle the
data. When the Link is sending data to the
transceiver, NXT indicates when the
current byte has been accepted by the
transceiver. The Link places the next byte
on the data bus in the following clock
cycle.
ULPI bi-directional data bus.
DS00001792B-page 6
2014-2015 Microchip Technology Inc.

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
USB3320

Hi-Speed USB 2.0 ULPI Transceiver

SMSC
SMSC
USB3320

Highly Integrated Full Featured Hi-Speed USB 2.0 ULPI Transceiver

Microchip
Microchip


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