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PDF STPTIC-33G2 Data sheet ( Hoja de datos )
| Número de pieza | STPTIC-33G2 | |
| Descripción | tunable integrated capacitor | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STPTIC-33G2
Parascan™ tunable integrated capacitor
6737,&
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Features
• High power capability
• 5:1 tuning range
• High linearity
• High quality factor (Q)
• Low leakage current
• Compatible with high voltage control IC
(STHVDAC series)
• Available in wafer level chip scale package:
– WLCSP package 0.61 x 0.66 x 0.3 mm
• ECOPACK®2 compliant component
Benefit
• RF tunable passive implementation in mobile
phones to optimize antenna radiated
performance
Applications
• Cellular antenna open loop tunable matching
network in multi-band GSM/WCDMA/LTE
mobile phone
• Open loop tunable RF filters
Datasheet - production data
Description
The ST integrated tunable capacitor offers
excellent RF performance, low power
consumption and high linearity required in
adaptive RF tuning applications. The fundamental
building block of PTIC is a tunable material called
Parascan™, which is a version of barium
strontium titanate (BST) developed by Paratek
Microwave.
BST capacitors are tunable capacitors intended
for use in mobile phone application and dedicated
to RF tunable applications. These tunable
capacitors are controlled through an extended
bias voltage ranging from 1 to 24 V. The
implementation of BST tunable capacitor in
mobile phones enables significant improvement
in terms of radiated performance making the
performance almost insensitive to the external
environment.
Figure 1. PTIC functional block diagram
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July 2015
This is information on a product in full production.
TM: Parascan is a trademark of Paratek Microwave Inc.
DocID028149 Rev 1
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1 page  
STPTIC-33G2
2 Package information
Package information
• Epoxy meets UL94, V0
• Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1 Flip-Chip package information
Figure 7. Flip-Chip package outline
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The land pattern below is recommended for soldering the STPTIC-G2 on PCB.
NC stands for No Connect, this pad must not be connected on application board. Please
leave this pad floating.
Table 4. Flip-Chip package dimensions
Dimensions (micron)
A1 A2 B1 B2 B4 C1 C2 D1 D2 D3 E1 E2
STPTIC-15/27/33/39/47G2
640
120
STPTIC-56G2
STPTIC-68G2
710 190
590 120 400
85 420 200 90
780 260
290 125 165
STPTIC-82G2
Tolerance
880 360
±30 ±30 ±15 ±10 ±15 ±15 ±10 ±20 ±20 ±40 ±20 ±20
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STPTIC-33G2
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and
improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on
ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order
acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
the design of Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
DocID028149 Rev 1
11/11
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| PDF Descargar | [ Datasheet STPTIC-33G2.PDF ] | |
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