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ISL89164 PDF Datasheet ( 特性, スペック, ピン接続図 )

部品番号 ISL89164
部品説明 Power MOSFET Driver
メーカ Intersil
ロゴ Intersil ロゴ 



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ISL89164 Datasheet, ISL89164 PDF,ピン配置, 機能
DATASHEET
High Speed, Dual Channel, 6A, Power MOSFET Driver
with Enable Inputs
ISL89163, ISL89164, ISL89165
The ISL89163, ISL89164, and ISL89165 are high-speed, 6A,
dual channel MOSFET drivers with enable inputs. These parts are
very similar to the ISL89160, ISL89161, ISL89162 drivers but
with an added enable input for each channel occupying NC pins 1
and 8 of the ISL89160, ISL89161, ISL89162.
Precision thresholds on all logic inputs allow the use of external
RC circuits to generate accurate and stable time delays on both
the main channel inputs, INA and INB, and the enable inputs,
ENA and ENB. The precision delays capable of these precise logic
thresholds makes these parts very useful for dead time control
and synchronous rectifiers. Note that the ENable and INput logic
inputs can be interchanged for alternate logic implementations.
Three input logic thresholds are available: 3.3V (CMOS), 5.0V
(CMOS or TTL compatible), and CMOS thresholds that are
proportional to VDD.
At high switching frequencies, these MOSFET drivers use very
little internal bias currents. Separate, non-overlapping drive
circuits are used to drive each CMOS output FET to prevent
shoot-thru currents in the output stage.
The start-up sequence is design to prevent unexpected glitches
when VDD is being turned on or turned off. When VDD < ~1V, an
internal 10kΩ resistor between the output and ground helps to
keep the output voltage low. When ~1V < VDD < UV, both outputs
are driven low with very low resistance and the logic inputs are
ignored. This insures that the driven FETs are off. When
VDD > UVLO, and after a short delay, the outputs now respond to
the logic inputs.
Features
• Dual output, 6A peak currents, can be paralleled
• Dual AND-ed input logic, (INput and ENable)
• Typical ON-resistance <1Ω
• Specified Miller plateau drive currents
• Very low thermal impedance (JC = 3°C/W)
• Hysteretic Input logic levels for 3.3V CMOS, 5V CMOS, TTL and
Logic levels proportional to VDD
• Precision threshold inputs for time delays with external RC
components
• 20ns rise and fall time driving a 10nF load.
Applications
• Synchronous Rectifier (SR) Driver
• Switch mode power supplies
• Motor Drives, Class D amplifiers, UPS, Inverters
• Pulse Transformer driver
• Clock/Line driver
Related Literature
AN1603 “ISL6752/54EVAL1Z ZVS DC/DC Power Supply with
Synchronous Rectifiers User Guide”
ENA
INA
GND
INB
1
2
3
4
EPAD
VDD
ENB
8
7 OUTA
6
5 OUTB
4.7µF
FIGURE 1. TYPICAL APPLICATION
3.0
POSITIVE THRESHOLD LIMITS
2.5
2.0
1.5 NEGATIVE THRESHOLD LIMITS
1.0
0.5
0.0
-40 -25 -10
5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
FIGURE 2. TEMP STABLE LOGIC THRESHOLDS
September 30, 2015
FN7707.4
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC. 2010-2012, 2015. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

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