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APM4050APU の電気的特性と機能

APM4050APUのメーカーはAnpecです、この部品の機能は「P-Channel Enhancement Mode MOSFET」です。


製品の詳細 ( Datasheet PDF )

部品番号 APM4050APU
部品説明 P-Channel Enhancement Mode MOSFET
メーカ Anpec
ロゴ Anpec ロゴ 




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APM4050APU Datasheet, APM4050APU PDF,ピン配置, 機能
APM4050APU
Features
-40V/-25A,
RDS(ON)=33m(typ.) @ VGS=-10V
RDS(ON)=47m(typ.) @ VGS=-4.5V
Super High Dense Cell Design
Reliable and Rugged
Lead Free Available (RoHS Compliant)
Applications
Inverter application in LCD Monitor/TV
P-Channel Enhancement Mode MOSFET
Pin Description
GD
S
Top View of TO-252
S
G
D
P-Channel MOSFET
Ordering and Marking Information
APM4050AP
Lead Free Code
Handling Code
Temp. Range
Package Code
Package Code
U : TO-252
Operating Junction Temp. Range
C : -55 to 150° C
Handling Code
TU : Tube TR : Tape & Reel
Lead Free Code
L : Lead Free Device
APM4050AP U: APM4050A
XXXXX
XXXXX - Date Code
Note: ANPEC lead-free products contain molding compounds and 100% matte tin plate termination finish;
which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations.
ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL
classification at lead-free peak reflow temperature.
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Sep., 2006
1
www.anpec.com.tw

1 Page





APM4050APU pdf, ピン配列
APM4050APU
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Test Condition
Min. Typ. Max.
Static Characteristics
BVDSS Drain-Source Breakdown Voltage
IDSS Zero Gate Voltage Drain Current
VGS(th) Gate Threshold Voltage
IGSS Gate Leakage Current
RDS(ON) a Drain-Source On-state Resistance
VGS=0V, IDS=-250µA
VDS=-32V, VGS=0V
TJ=85°C
VDS=VGS, IDS=-250µA
VGS=±16V, VDS=0V
VGS=-10V, IDS=-12A
VGS=-4.5V, IDS=-5A
-40
-1.3
Diode Characteristics
VSDa Diode Forward Voltage
trr Reverse Recovery Time
Qrr Reverse Recovery Charge
Dynamic Characteristics b
RG Gate Resistance
Ciss Input Capacitance
Coss Output Capacitance
Crss Reverse Transfer Capacitance
td(ON) Turn-on Delay Time
Tr Turn-on Rise Time
td(OFF) Turn-off Delay Time
Tf Turn-off Fall Time
Gate Charge Characteristics b
Qg Total Gate Charge
Qgs Gate-Source Charge
Qgd Gate-Drain Charge
ISD=-10A, VGS=0V
IDS=-12A, dlSD/dt=100A/µs
VGS=0V,VDS=0V,F=1MHz
VGS=0V,
VDS=-20V,
Frequency=1.0MHz
VDD=-20V, RL=20,
IDS=-1A, VGEN=-10V,
RG=6
VDS=-20V, VGS=-10V,
IDS=-12A
Notes:
a : Pulse test ; pulse width300ms, duty cycle2%.
b : Guaranteed by design, not subject to production testing.
-1.8
33
47
-0.8
15
7
9.5
1080
120
70
11
9
50
27
18
2.5
4.5
-1
-30
-2.5
±10
45
68
-1.1
21
17
91
50
25
Unit
V
µA
V
µA
m
V
ns
nC
pF
ns
nC
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Sep., 2006
3
www.anpec.com.tw


3Pages


APM4050APU 電子部品, 半導体
APM4050APU
Typical Characteristics (Cont.)
Drain-Source On Resistance
2.0
V = -10V
GS
1.8 I = -12A
DS
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
R @T =25oC:
ON j
33m
-50 -25 0 25 50 75 100 125 150
Tj - Junction Temperature (°C)
Source-Drain Diode Forward
50
10 T =150oC
j
T =25oC
j
1
0.1
0.0 0.3 0.6 0.9 1.2 1.5 1.8
VSD - Source - Drain Voltage (V)
1400
1200
1000
Capacitance
Frequency=1MHz
Ciss
800
600
400
200 Coss
Crss
0
0 5 10 15 20 25 30 35 40
VDS - Drain - Source Voltage (V)
Gate Charge
10
V = -20V
DS
9 I = -12A
D
8
7
6
5
4
3
2
1
0
0 3 6 9 12 15
QG - Gate Charge (nC)
18
Copyright © ANPEC Electronics Corp.
Rev. A.1 - Sep., 2006
6
www.anpec.com.tw

6 Page



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部品番号部品説明メーカ
APM4050APU

P-Channel Enhancement Mode MOSFET

Anpec
Anpec


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