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ISL54100 の電気的特性と機能

ISL54100のメーカーはIntersilです、この部品の機能は「TMDS Regenerators」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL54100
部品説明 TMDS Regenerators
メーカ Intersil
ロゴ Intersil ロゴ 




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ISL54100 Datasheet, ISL54100 PDF,ピン配置, 機能
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ISL54100, ISL54101, ISL54102
June 4, 2008
FN6275.5
TMDS Regenerators with Multiplexers
The ISL54100, ISL54101, ISL54102 are high-performance
TMDS (Transition Minimized Differential Signaling) timing
regenerators and multiplexers. The receiver contains a
programmable equalizer and a clock data recovery (CDR)
function for each of the 3 TMDS pairs in an HDMI or DVI
signal. The TMDS data outputs of the ISL54100 are
regenerated and perfectly aligned to the regenerated
TMDS clock signal, creating an extremely clean, low-jitter
DVI/HDMI signal that can be easily decoded by any TMDS
receiver.
The ISL54100’s design and package footprint supports
many compound configurations. Two ISL54100s can create
a DualLink 4:1 mux, a 4:2 crosspoint, or an 8:1 mux.
Additional ISL54100s can create larger combinations of
these building blocks. The ISL54102 with its 2:1
multiplexing function serves applications with fewer inputs,
while the ISL54101 can be used as a cable extender, to
clean up a noisy/jittery TMDS source, or to provide a very
stable TMDS signal to a marginal DVI or HDMI receiver.
Certified HDMI 1.3a compliant by the HDMI ATC for the
following features: 12 bit Deep Color (1080i/720p
guaranteed, 1080p typical), x.v.Color™, and all HDMI1.3
audio formats and options.
Block Diagrams
Features
• ISL54100: 4:1 TMDS regenerator and multiplexer
• ISL54101: 1:1 TMDS regenerator
• ISL54102: 2:1 TMDS regenerator and multiplexer
• Clock Data Recovery and Retiming function enables use
as TMDS range extender
• Programmable pre-emphasis on output driver
• Channel activity detect based on input TMDS clock activity
• Symmetrical pinout enables high-performance DualLink,
4:2 crosspoint and 8:1 multiplexing options
• Programmable internal 50Ω, 100Ω, or high-Z termination
• External pins for channel select, activity detection
• Stand-alone or I2C software-controlled operation
• Hardware, software, or automatic channel selection
• Pb-free (RoHS compliant)
Applications
• KVM switches
• A/V receivers
• DVI/HDMI extenders
• Televisions/PC monitors/projectors
TMDS IN (A) 4X2
TMDS IN (B) 4X2
TMDS IN (C) 4X2
TMDS IN (D) 4X2
RECOVERY AND
REGENERATION
TMDS TX
4X2 TMDS OUT
ISL54100
TMDS IN 4X2
TMDS IN (A) 4X2
TMDS IN (B) 4X2
1
RECOVERY AND
REGENERATION
TMDS TX
4X2 TMDS OUT
ISL54101
RECOVERY AND
REGENERATION
TMDS TX
4X2 TMDS OUT
ISL54102
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006-2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL54100 pdf, ピン配列
ISL54100, ISL54101, ISL54102
Absolute Maximum Ratings
Voltage on VD (referenced to GND). . . . . . . . . . . . . . . . . . . . . . 4.0V
Voltage on any Input Pin (referenced to GND) . . . -0.3V to VD+0.3V
Voltage on any “5V Tolerant” Input Pin
(referenced to GND). . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6.0V
Current into any Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . ±20mA
ESD Classification
Human Body Model . . . >4000V, higher voltage testing in progress
Machine Model . . . . . . . .>200V, higher voltage testing in progress
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (°C/W)
MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Maximum Biased Junction Temperature . . . . . . . . . . . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VD = 3.3V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Specifications apply for VD = 3.3V, pixel rate = 165MHz, TA = +25°C, RES_TERM = 1kΩ, RES_BIAS = 3.16kΩ,
TMDS output load = 50Ω, TMDS output termination voltage VTERM = 3.0V unless otherwise noted.
SYMBOL
PARAMETER
COMMENT
MIN
(Note 2)
TYP
MAX
(Note 2)
UNIT
FULL CHANNEL CHARACTERISTICS
fDATA_MAX Maximum Rx Clock Frequency/Pixel Rate
fDATA_MIN Minimum Rx Clock Frequency/Pixel Rate
TMDS RECEIVER CHARACTERISTICS
(Note 3)
165 225
MHz
25 MHz
VSENS Minimum Differential Input Sensitivity
R50 50Ω Termination Resistance
R100
100Ω Termination Resistance
CLKDUTY Rx Clock Duty Cycle
TMDS TRANSMITTER CHARACTERISTICS
50 150 mVP-P
45 50 55
Ω
90 97 110 Ω
20 80 %
jTX_CLOCK Total Jitter on Clock Outputs
jTX_DATA Total Jitter on Data Outputs
SKEWINTRA Intra-Pair (+ to -) Differential Skew
SKEWINTER Inter-Pair (channel-to-channel) Skew
Independent of incoming jitter
Independent of incoming jitter
Added with respect to incoming
inter-pair skew
32
52
±4
2
ps
ps
ps
UI
tRISE Rise Time into 50Ω Load to 3.3V
tFALL
Fall Time into 50Ω Load to 3.3V
TX VOH Single-Ended High Level Output Voltage
TX VOL Single-Ended Low Level Output Voltage
DIGITAL SCHMITT INPUT CHARACTERISTICS
20% to 80%
20% to 80%
80
80
VTERM - 10
VTERM - 600
240
240
VTERM + 10
VTERM - 400
ps
ps
mV
mV
VIH High Threshold Voltage
VIL High to Low Threshold Voltage
I Input Leakage Current
2.0
0.8
±10
V
V
nA
RPU Internal Pull-Up Resistance
RPD Internal Pull-Down Resistance
SDA and SCL pins
AUTO_CH_SEL, CH_SEL_x,
RESET, ADDRx, PD pins
65 kΩ
60 kΩ
CIN Input Capacitance
5 pF
3 FN6275.5
June 4, 2008


3Pages


ISL54100 電子部品, 半導体
ISL54100, ISL54101, ISL54102
ISL54101 Pin Configuration
ADDR2 1
PD 2
VD 3
NC 4
NC 5
VD 6
GND 7
VD 8
RXC-_A 9
RXC+_A 10
VD 11
NC 12
NC 13
VD 14
GND 15
VD 16
GND 17
GND 18
VD 19
RES_TERM 20
VD 21
RES_BIAS 22
GND 23
GND 24
VD 25
NC 26
NC 27
VD 28
NC 29
NC 30
VD 31
GND 32
VD 33
NC 34
NC 35
VD 36
RESET 37
ADDR3 38
6
102 NC
101 NC
100 NC
99 CH_A_ACTIVE
98 VD
97 GND
96 GND
95 VD_ESD
94 VD
93 GND
92 VD
91 GND
90 TXC+
89 TXC-
88 GND
87 TX2+
86 TX2-
85 GND
84 TX1+
83 TX1-
82 GND
81 TX0+
80 TX0-
79 GND
78 GND
77 VD
76 GND
75 GND
74 VD_ESD
73 VD
72 GND
71 TEST
70 SCL
69 SDA
68 NC
67 NC
66 GND
65 ADDR6
FN6275.5
June 4, 2008

6 Page



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共有リンク

Link :


部品番号部品説明メーカ
ISL54100

TMDS Regenerators

Intersil
Intersil
ISL54100A

TMDS Regenerators

Intersil
Intersil
ISL54101

TMDS Regenerators

Intersil
Intersil
ISL54101A

TMDS Regenerators

Intersil
Intersil


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