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PDF RTL8211DN-VB-GR Data sheet ( Hoja de datos )
| Número de pieza | RTL8211DN-VB-GR | |
| Descripción | INTEGRATED 10/100/1000M ETHERNET TRANSCEIVER V1.4 | |
| Fabricantes | Realtek | |
| Logotipo |  |
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7
RTL8211DN-VB-GR
INTEGRATED 10/100/1000M ETHERNET
TRANSCEIVER
DATASHEET
(CONFIDENTIAL: Development Partners Only)
Rev. 1.4
27 May 2011
Track ID: JATR-2265-11
Realtek Semiconductor Corp.
No. 2, Innovation Road II, Hsinchu Science Park, Hsinchu 300, Taiwan
Tel.: +886-3-578-0211 Fax: +886-3-577-6047
www.realtek.com
1 page  
RTL8211DN
Datasheet
6.11.2. Auto-Negotiation Master/Slave Resolution .....................................................................................................24
6.11.3. Auto-Negotiation PAUSE/ASYMMETRIC PAUSE Resolution........................................................................25
6.12. CROSSOVER DETECTION AND AUTO-CORRECTION ....................................................................................................26
6.13. LED CONFIGURATION................................................................................................................................................27
6.14. POLARITY CORRECTION .............................................................................................................................................29
6.15. POWER .......................................................................................................................................................................29
7. REGISTER DESCRIPTIONS.........................................................................................................................................30
7.1. PAGE0 REGISTER MAPPING AND DEFINITIONS ...........................................................................................................30
7.2. EXTENSION PAGE REGISTER MAPPING AND DEFINITION............................................................................................30
7.3. MMD REGISTER MAPPING AND DEFINITION..............................................................................................................31
7.4. REGISTER TABLE .......................................................................................................................................................31
7.4.1. BMCR (Basic Mode Control Register, Address 0x00) .........................................................................................31
7.4.2. BMSR (Basic Mode Status Register, Address 0x01).............................................................................................33
7.4.3. PHYID1 (PHY Identifier Register 1, Address 0x02) ............................................................................................34
7.4.4. PHYID2 (PHY Identifier Register 2, Address 0x03) ............................................................................................34
7.4.5. ANAR (Auto-Negotiation Advertising Register, Address 0x04) ...........................................................................35
7.4.6. ANLPAR (Auto-Negotiation Link Partner Ability Register, Address 0x05) .........................................................35
7.4.7. ANER (Auto-Negotiation Expansion Register, Address 0x06) .............................................................................36
7.4.8. ANNPTR (Auto-Negotiation Next Page Transmit Register, Address 0x07) .........................................................36
7.4.9. ANNPRR (Auto-Negotiation Next Page Receive Register, Address 0x08) ...........................................................37
7.4.10. GBCR (1000Base-T Control Register, Address 0x09).....................................................................................37
7.4.11. GBSR (1000Base-T Status Register, Address 0x0A) .......................................................................................38
7.4.12. MACR (MMD Access Control Register, Address 0x0D) .................................................................................38
7.4.13. MAADR (MMD Access Address Data Register, Address 0x0E)......................................................................39
7.4.14. GBESR (1000Base-T Extended Status Register, Address 0x0F) .....................................................................39
7.4.15. PHYCR (PHY Specific Control Register, Address 0x10).................................................................................39
7.4.16. PHYSR (PHY Specific Status Register, Address 0x11)....................................................................................40
7.4.17. INER (Interrupt Enable Register, Address 0x12) ............................................................................................40
7.4.18. INSR (Interrupt Status Register, Address 0x13) ..............................................................................................41
7.4.19. RXERC (Receive Error Counter, Address 0x18) .............................................................................................41
7.4.20. PAGSEL (Page Select Register, Address 0x1F) ..............................................................................................41
7.4.21. SDSR (SerDes Register, ExtPage 140, Address 0x16) ....................................................................................42
7.4.22. PC1R (PCS Control 1 Register, MMD Device 3, Address 0x00) ....................................................................42
7.4.23. PS1R (PCS Status1 Register, MMD Device 3, Address 0x01) ........................................................................42
7.4.24. EEECR (EEE Capability Register, MMD Device 3, Address 0x14)................................................................42
7.4.25. EEEWER (EEE Wake Error Register, MMD Device 3, Address 0x16) ..........................................................43
7.4.26. EEEAR (EEE Advertisement Register, MMD Device 7, Address 0x3c) ..........................................................43
7.4.27. EEELPAR (EEE Link Partner Ability Register, MMD Device 7, Address 0x3d) ............................................43
8. SWITCHING REGULATOR..........................................................................................................................................44
8.1. PCB LAYOUT.............................................................................................................................................................44
8.2. INDUCTOR AND CAPACITOR PARTS LIST ....................................................................................................................45
8.3. MEASUREMENT CRITERIA..........................................................................................................................................46
8.4. EFFICIENCY MEASUREMENT ......................................................................................................................................50
8.5. POWER SEQUENCE .....................................................................................................................................................51
9. CHARACTERISTICS .....................................................................................................................................................52
9.1. ABSOLUTE MAXIMUM RATINGS.................................................................................................................................52
9.2. RECOMMENDED OPERATING CONDITIONS .................................................................................................................52
9.3. CRYSTAL REQUIREMENTS..........................................................................................................................................53
9.4. OSCILLATOR/EXTERNAL CLOCK REQUIREMENTS ......................................................................................................53
9.5. DC CHARACTERISTICS...............................................................................................................................................54
9.5.1. SGMII DC Characteristics ...................................................................................................................................54
Integrated 10/100/1000M Ethernet Transceiver
v
Track ID: JATR-2265-11 Rev. 1.4
5 Page 
3. System Applications
RTL8211DN
Datasheet
MAU (Media Access Unit)
CNR (Communication and Network Riser)
Game Console
Printer and Office Machine
DVD Player and Recorder
Ethernet Hub
Ethernet Switch
In addition, it can be used in any embedded system with an Ethernet MAC that needs a UTP or Fiber
physical connection.
3.1. Fiber Application Diagram
Figure 1. Fiber Application Diagram
3.2. UTP Application Diagram
25MHz Clock
LED Power 3.3V ,1.05V
SerDes
RTL 8211 DN
SGMII
GMII/RGMII
125MHz Clock
MDC
MDIO
Figure 2. UTP Application Diagram
MAC
Integrated 10/100/1000M Ethernet Transceiver
3
Track ID: JATR-2265-11 Rev. 1.4
11 Page | ||
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| PDF Descargar | [ Datasheet RTL8211DN-VB-GR.PDF ] | |
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