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ISL1801 の電気的特性と機能

ISL1801のメーカーはIntersilです、この部品の機能は「sPMIC」です。


製品の詳細 ( Datasheet PDF )

部品番号 ISL1801
部品説明 sPMIC
メーカ Intersil
ロゴ Intersil ロゴ 




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ISL1801 Datasheet, ISL1801 PDF,ピン配置, 機能
sPMIC for Micro Converter Bias and Drivers
ISL1801
The ISL1801 is a power management IC (PMIC) optimized for
solar array micro converters and other systems operating from
a high voltage DC supply. The ISL1801 can be used in buck,
boost or buck-boost microconverter topologies in order to
maximize the energy harvest from a solar array. In addition to
the power stage and main controller, the ISL1801 includes the
bias regulators, gate drivers, current sense amplifier and
comparators needed for micro converters.
The ISL1801 integrates two switching regulators that can be
used to generate the driver and the micro-controller (MCU)
power supplies. In addition, it has a low offset, low drift
amplifier for current sensing, two comparators for overvoltage
and overcurrent protection plus a watchdog timer to reset the
MCU if necessary. This single IC solution offers high integration
and dramatically reduces the total number of components in
the microconverter system improving the system reliability and
reducing cost.
The first regulator takes input voltages ranging from 9V to 90V
from the solar panel and outputs a regulated supply for drivers
and the secondary regulator. The secondary regulator converts
the output of the first regulator to a programmable
micro-controller supply, typically 3.3V. A high voltage start-up
LDO provides the necessary bias voltage until the switching
regulator is operating.
The ISL1801 integrates two high-speed MOSFET drivers for
buck, flyback or boost converters configured as shown in the
application schematics. The Drive3 also has the integrated
peak current limiting capabilities.
The ISL1801 includes comprehensive start-up, shutdown and
fault logic to ensure reliable operation of micro converters in
solar applications.
Features
• 90V input buck switching regulator
- 120mA (minimum) output with OCP, OVP, OTP
- Integrated upper and lower MOSFETs
• 90V on-chip start-up 6.7V LDO
• Low voltage buck switching regulator
- 200mA (minimum) output with OCP, OVP
- Integrated upper and lower MOSFETs
- PGOOD output
• Low voltage bias LDO
- Input voltage range from 6V to 14V
- Regulated 5V output up to 10mA
• Dual high-speed gate driver
- 14V voltage rating
- 2A peak sourcing and 5A peak sinking current
- Peak current limit for DRIVE3
• Dedicated amplifier for accurate current sense
• Two comparators for general purpose protection
• Integrated watchdog timer
Applications
• Solar power optimizer
• Solar power micro-inverter
• Solar charge controller
• Telecom power supply
July 24, 2014
FN8259.1
VIN +
PV MODULE
SENSE
3.3V
ISL1801
CONTROL
PROCESSOR AND/OR
COMMUNICATIONS
FIGURE 1. TYPICAL APPLICATION
VOUT +
VOUT -
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2012, 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 Page





ISL1801 pdf, ピン配列
Block Diagram
ISL1801
BRESET
BCMD
PVCC3
BDRIVE
PGND4
DRIVE3
PGND3
PWM3
PHASE3
OCSET3
PVCC3
PVCC3
ISEN
LATCHRPT
120µA
CMP2+
CMP2-
GND
CMP2
CMP1+
CMP1-
CMP1O
RPWM3
PGOOD2
CMP1
ENABLE
FF3
Q SET S
Q CLR R
ENABLE
FF2
CL
S SET Q
R CLR Q
ONE
SHOT
S SET Q
R CLR Q
FF1
7V
PVCC3
0.5*VDDREF
UVLO
LDO1
OC, OV,
OT, SS
LEVEL
SHIFT
PWM
Logic
VCC1
Q SET S
Q CLR R
PVCC3
LDO2
POR
VREF1
ON-TIME
CONTROL
FB2
GND
DELAY
VDDREF
VREF2*0.88
VREF2
-
+
ON-TIME
CONTROL
VCC5V
S SET Q
R CLR Q
PWM
Logic
VCC5V
SS, OC, OV, OT
VCC1
VIN1
AGND
BOOT1
PHASE1
PGND1
FB1
TON1
VCC5V
GND
TON2
BOOT2
VIN2
PHASE2
PGND2
AMPO
AMP-
AMP+
SGND
WDO WATCHDOG
VDDREF
PRE-LOAD
CONTROL
GND
FIGURE 2. ISL1801 BLOCK DIAGRAM
GND
WDI
TIMER
PRELOAD
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July 24, 2014


3Pages


ISL1801 電子部品, 半導体
ISL1801
Pin Descriptions (Continued)
PIN#
42
43
45
47
PIN NAME
DESCRIPTION
BOOT1
The boot pin of the high voltage switching regulator. An external bootstrap capacitor is required. This pin provides bias voltage
to the high-side MOSFET driver. A bootstrap circuit is used to create a voltage suitable to drive the internal N-channel MOSFET.
The boot diode is included within the IC.
PHASE1 The phase node of the high voltage switching regulator, VR1. This pin should be connected to the output inductor.
VIN1
Input to both the high voltage switching regulator and the high voltage start-up LDO1. This pin connects the high voltage
supply to the drain of the internal high-side MOSFET.
PGND1
The ground pin of the high voltage switching regulator’s power stage. There are switching power current pulses coming out of
this pin. Place the VIN1 decoupling capacitor as close as possible to this pin.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
VIN1 RANGE
(V)
TEMP RANGE
(°C)
PACKAGE
(Pb-free)
PKG.
DWG. #
ISL1801IVZ
ISL1801 IVZ
9 to 90
-40 to +85
48 Ld TSSOP
M48.240
ISL1801EVAL1ZA
Evaluation Board
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL1801. For more information on MSL please see tech brief TB363.
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FN8259.1
July 24, 2014

6 Page



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部品番号部品説明メーカ
ISL1801

sPMIC

Intersil
Intersil


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