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PDF FAN41501 Data sheet ( Hoja de datos )
| Número de pieza | FAN41501 | |
| Descripción | Ground Fault Interrupter Self-Test Digital Controller | |
| Fabricantes | Fairchild Semiconductor | |
| Logotipo |  |
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June 2014
FAN41501
Ground Fault Interrupter Self-Test Digital Controller
Features
Meets 2015 UL943 Self-Test GFCI Requirement
Internal 1-Second and 90-Minute Self-Test Timers
Periodic Functional Testing for Key GFIC
Components: GFCI Controller, Solenoid, Sense
Transformer, and Silicon-Controlled Rectifier (SCR)
Periodic EOL Testing without Compromising
Normal GFCI Protection
Built-in Noise Filters Reduce False EOL Signals
Automatic EOL Reset Capability
Easily Added to Existing GFCI Applications
Built-in 5 V Shunt Regulator
Energy-Saving System Solution
Minimum External Components
Space-Saving SuperSOT™ 6-Pin Package
Applications
GFCI Output Receptacle
GFCI Circuit Breakers
Portable GFCI Cords
Description
The FAN41501 is a digital controller for periodic
functional testing of key Ground Fault Circuit
Interrupters (GFCI) components. In combination with an
existing Fairchild GFI controller, it periodically tests for
the functional operation of the GFCI controller, solenoid,
sense transformer, SCR, and other discrete
components without disrupting power to the load or
compromising normal GFCI protection functionality. If
the FAN41501 detects a faulty GFCI component, it
generates an End-of-Life (EOL) fault signal that can be
used to deny power and/or automatically reset after the
denial of power.
When the AC power is first applied, an internal timer
starts a test cycle at one second. After this initial test
cycle, the internal timer starts a test cycle every 90
minutes. During a test cycle, the FAN41501 simulates a
ground fault and monitors the key GFCI components. If
the FAN41501 detects a component fault, it verifies the
fault several times to prevent a false EOL signal. At no
time during a test cycle is the normal GFCI protection
disabled or compromised.
The FAN41501 includes a 5 V shunt regulator, one-
second timer, 90-minute timer, digital control logic,
detection comparators, and an EOL driver output.
The FAN41501, together with a GFCI controller such as
FAN4149, provides a complete UL943 GFCI function
with automatic monitoring capability, low system power,
and a minimum number of external components.
The 6-pin, SuperSOT package enables a low-cost,
compact design and layout.
Ordering Information
Part Number
FAN41501SX
Operating
Temperature Range
-35°C to +85°C
Package
6-Lead, SuperSOT, JEDEC M0-193, 1.6 mm
Packing Method
Tape and Reel
© 2014 Fairchild Semiconductor Corporation
FAN41501 • 1.0.1
www.fairchildsemi.com
1 page  
Functional Description
(Refer to Figure 1)
Starting in June 2015, UL943 will require all
permanently connected GFCI products to perform a self
test function. The FAN41501, together with a GFI
controller device – like the FAN4149 – provides GFI
fault protection and periodic self testing of the key GFCI
components: solenoid, SCR, GFI controller, sense coil,
and other discrete components.
The FAN41501 has an internal 5.35 V shunt regulator.
With diodes D2-5 and resistor R2, the shunt regulator
clamps the FAN41501 VDD supply voltage to 5.35 V.
Capacitor C5 provides bias during the VAC zero phase
crossing so the FAN41501 is continuously biased.
When power is first applied, an internal Power-On-Reset
(POR) circuit detects when VDD is greater than 2.5 V.
The POR circuit generates an internal reset pulse and
initializes a one-second timer. After one second, the first
self-test cycle starts. During the positive half cycle when
the “line-hot” voltage is positive with respect to the “line-
neutral” voltage, the SCR anode voltage is monitored by
means of resistor R4 connected to pin 1 (SCR Test).
The FAN41501 clamps this pin to VDD, mirrors the
current through R4 to an internal low-pass filter circuit,
and compares its value to an internal reference
threshold. When the current level exceeds the reference
threshold, an internal latch is set. This test determines
the continuity of the solenoid and SCR. The threshold
level is determined by:
Vthrms = (65 A x R4) + 4
(1)
where Vthrms is the rms VAC input voltage with a
tolerance of ±10%.
With the recommended application values, the SCR
anode voltage must exceed a worst-case peak voltage
of approximately 65 V (rms). Equation (1) can be used if
a lower threshold voltage value is desired to allow this
test to pass during a brownout or voltage sag condition.
To test the functionality of the GFCI controller, sense
coil, and SCR; a simulated ground fault condition is
generated. Like the SCR Test pin; the Phase pin (pin 4)
is clamped to VDD + 700 mV, mirrors the current through
R3 to an internal low-pass filter circuit, and compares its
value to an internal reference. This internal circuit
detects when the phase signal is near the end of the
positive half cycle. When this occurs, an internal current
source is enabled to bias the SCR Test pin. This
prevents the SCR anode voltage from discharging to
zero during the negative half cycle since it is reverse-
biased by diode D1. At the end of the positive half cycle,
the FAN41501 generates a current pulse for the Fault
Test pin (pin 6). This current pulse enables transistor
Q2, which biases the collector voltage of Q2 to a low
voltage. During the negative half cycle when the line-
neutral voltage is positive with respect to the line-hot
voltage, current flows through resistor RTEST2 when Q2 is
enabled. This current creates a simulated ground fault
from line-neutral to load hot. This current is detected by
the GFI controller (i.e. FAN4149) and, when it exceeds
the programmed trip threshold set by RSET (typically
5 mArms), the controller enables the SCR Q1 (see
FAN4149 datasheet for IFAULT trip threshold equation).
The SCR quickly discharges the anode voltage, which is
pre-biased by the FAN41501 control logic. The
discharge of the anode voltage also biases the voltage
at the SCR Test pin to a low voltage by forward-biasing
diode D6. The FAN41501 monitors the SCR Test pin
during this test cycle and sets a latch if the SCR is
triggered. The simulated ground fault tests for the
functionality of the controller, R1, D1, D2-5(5), sense coil,
and SCR without opening the load contacts. The load
contacts do not open during this test because D1 is
reversed biased, which prevents current from energizing
the solenoid. Once the FAN41501 detects the triggering
of the SCR, the current pulse for Q2 is disabled and the
bias current for pin SCR Test is removed. This disables
the SCR so that during the next positive half cycle the
solenoid is not energized. With the recommended
application values, the simulated ground fault triggers
the controller with a VAC input voltage greater than
50 Vrms. If a different voltage threshold is required, the
RTEST2 resistor can be adjusted (per the FAN4149
datasheet). Figure 4, Figure 5 and Figure 6 show a
passing self-test cycle. The waveform of channel 4
shows when the Q2 transistor is enabled and a ground
fault is simulated by the current through resistor RTEST2.
The channel 3 waveform shows the gate of the SCR
Q1. Figure 6 shows the pre-bias for the SCR anode
voltage, waveform of channel 1. Figure 6 illustrates that,
when the gate of the SCR is enabled by the controller,
the voltage of the SCR anode is quickly discharged. The
FAN41501 detects this and a self-test cycle is
completed with all of the required components passing.
The Q2 bias is disabled, which causes the GFCI
controller to disable the SCR gate bias.
Note:
5. Redundant diodes may be required.
If the first self-test cycle passes after power up,
subsequent self-test cycles occur every 90 minutes. At
no time does the FAN41501 disable the normal
controller GFI protection circuitry.
If any one of the above self tests fail, the FAN41501
repeats the self testing until a 66 ms timer expires. If this
occurs, the EOL latch is enabled and the FAN41501
EOL Alarm pin 5 goes HIGH. This signal can be
connected to a separate SCR or to the gate of Q1 with a
series diode. When the EOL Alarm goes HIGH, the SCR
is enabled and energizes the solenoid, which opens the
load contacts. When the EOL Alarm pin goes HIGH, if it
is connected to the gate of an SCR, VDD drops below
2.5 V. This generates a Power-On-Reset that resets the
logic and repeats a self-test cycle in one second. Figure
7 to Figure 10 show a FAN41501 self-test cycle for a
SCR, GFI controller, sense coil, and solenoid failure.
© 2014 Fairchild Semiconductor Corporation
FAN41501 • 1.0.1
5
www.fairchildsemi.com
5 Page 
© 2014 Fairchild Semiconductor Corporation
FAN41501 • 1.0.1
11
www.fairchildsemi.com
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet FAN41501.PDF ] | |
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