SIR172DP Datasheet PDF - Vishay
| Part Number | SIR172DP | |
| Description | N-Channel 30V (D-S) MOSFET | |
| Manufacturers | Vishay | |
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There is a preview and SIR172DP download ( pdf file ) link at the bottom of this page. Total 13 Pages | ||
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N-Channel 30-V (D-S) MOSFET
SiR172DP
Vishay Siliconix
PRODUCT SUMMARY
VDS (V)
RDS(on) ()
30 0.0089 at VGS = 10 V
0.0124 at VGS = 4.5 V
ID (A)a, g
20
20
Qg (Typ.)
9.8 nC
PowerPAK SO-8
FEATURES
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• Low Thermal Resistance PowerPAK® Package
with Low 1.07 mm Profile
• Optimized for High-Side Synchronous Rectifier
Operation
• 100 % Rg and UIS Tested
• Compliant to RoHS Directive 2002/95/EC
6.15 mm
S
1S
5.15 mm
2
S
3G
4
D
8D
7
D
6
D
5
Bottom View
Ordering Information: SiR172DP-T1-GE3 (Lead (Pb)-free and Halogen-free)
APPLICATIONS
• Notebook CPU Core
- High-Side Switch
G
N-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TC = 25 °C
Continuous Drain Current (TJ = 150 °C)
TC = 70 °C
TA = 25 °C
ID
Pulsed Drain Current
TA = 70 °C
IDM
Continuous Source-Drain Diode Current
TC = 25 °C
TA = 25 °C
IS
Single Pulse Avalanche Current
Avalanche Energy
L = 0.1 mH
IAS
EAS
TC = 25 °C
Maximum Power Dissipation
TC = 70 °C
TA = 25 °C
PD
Operating Junction and Storage Temperature Range
TA = 70 °C
TJ, Tstg
Soldering Recommendations (Peak Temperature)d, e
Limit
30
± 20
20g
20g
16.1b, c
12.9b, c
50
20g
3.2b, c
21
22
29.8
19
3.9b, c
2.5b, c
- 55 to 150
260
D
S
Unit
V
A
mJ
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambientb, f
Maximum Junction-to-Case (Drain)
t 10 s
Steady State
Symbol
RthJA
RthJC
Typical
27
3.5
Maximum
32
4.2
Unit
°C/W
Notes:
a. Base on TC = 25 °C.
b. Surface mounted on 1" x 1" FR4 board.
c. t = 10 s.
d. See Solder Profile (www.vishay.com/ppg?73257). The PowerPAK SO-8 is a leadless package. The end of the lead terminal is exposed copper
(not plated) as a result of the singulation process in manufacturing. A solder fillet at the exposed copper tip cannot be guaranteed and is not
required to ensure adequate bottom side solder interconnection.
e. Rework conditions: manual soldering with a soldering iron is not recommended for leadless components.
f. Maximum under steady state conditions is 70 °C/W.
g. Package limited.
Document Number: 65271
www.vishay.com
S11-1647-Rev. B, 22-Aug-11
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
50
SiR172DP
Vishay Siliconix
40
30
Package Limited
20
10
0
0 25 50 75 100 125 150
TC - Case Temperature (°C)
Current Derating*
40 2.5
2.0
30
1.5
20
1.0
10
0.5
0
0 25 50 75 100 125
TC - Case Temperature (°C)
Power Derating, Junction-to-Case
150
0.0
0
25 50 75 100 125
TA - Ambient Temperature (°C)
Power Derating, Junction-to-Ambient
150
* The power dissipation PD is based on TJ(max) = 150 °C, using junction-to-case thermal resistance, and is more useful in settling the upper
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
Document Number: 65271
www.vishay.com
S11-1647-Rev. B, 22-Aug-11
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
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| Information | Total 13 Pages | |
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| Download | [ SIR172DP.PDF Datasheet ] | |
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