MC74HC11A Datasheet PDF - ON Semiconductor
| Part Number | MC74HC11A | |
| Description | Triple 3-Input AND Gate | |
| Manufacturers | ON Semiconductor | |
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MC74HC11A
Triple 3-Input AND Gate
High−Performance Silicon−Gate CMOS
The MC74HC11A is identical in pinout to the LS11. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 V to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
• These Devices are Pb−Free, Halogen Free and are RoHS Compliant
A1
B1
1
2
13
C1
12 Y1
A2
B2
3
4
5
C2
6 Y2
Y = ABC
A3
B3
9
10
11
C3
8 Y3
PIN 14 = VCC
PIN 7 = GND
Figure 1. Logic Diagram
http://onsemi.com
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
MARKING
DIAGRAMS
HC11AG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
HC
11A
ALYWG
G
1
A
WL, L
YY, Y
WW, W
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
PIN ASSIGNMENT
A1
B1
A2
B2
C2
Y2
GND
1
2
3
4
5
6
7
14 VCC
13 C1
12 Y1
11 C3
10 B3
9 A3
8 Y3
FUNCTION TABLE
Inputs
Output
A B CY
L X XL
X L XL
X X LL
H H HH
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2013
June, 2013 − Rev. 3
1
Publication Order Number:
MC74HC11A/D
|
| |
 
MC74HC11A
PACKAGE DIMENSIONS
0.15 (0.006) T U S
2X L/2 14
L
PIN 1
IDENT.
1
TSSOP−14
CASE 948G−01
ISSUE B
14X K REF
0.10 (0.004) M T U S V S
N
8
B
−U− N
0.25 (0.010)
M
F
7 DETAIL E
0.15 (0.006) T U S
A
−V−
K
J J1 ÇÇÉÉÇÇÉÉK1ÇÇÉÉ
SECTION N−N
0.10 (0.004)
−T− SEATING
PLANE
D
C
G
H DETAIL E
SOLDERING FOOTPRINT*
7.06
1
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION SHALL
NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
MILLIMETERS INCHES
DIM MIN MAX MIN MAX
A 4.90 5.10 0.193 0.200
B 4.30 4.50 0.169 0.177
C −−− 1.20 −−− 0.047
D 0.05 0.15 0.002 0.006
F 0.50 0.75 0.020 0.030
G 0.65 BSC
0.026 BSC
H 0.50 0.60 0.020 0.024
J 0.09 0.20 0.004 0.008
−W−
J1 0.09 0.16 0.004 0.006
K 0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L 6.40 BSC
0.252 BSC
M 0_ 8_ 0_ 8_
0.65
PITCH
14X
0.36
14X
1.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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| Information | Total 6 Pages | |
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