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BLF10M6LS160のメーカーはNXP Semiconductorsです、この部品の機能は「Power LDMOS transistor」です。 |
部品番号 | BLF10M6LS160 |
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部品説明 | Power LDMOS transistor | ||
メーカ | NXP Semiconductors | ||
ロゴ | |||
このページの下部にプレビューとBLF10M6LS160ダウンロード(pdfファイル)リンクがあります。 Total 12 pages
BLF10M6160; BLF10M6LS160
Power LDMOS transistor
Rev. 1 — 24 June 2014
Product data sheet
1. Product profile
1.1 General description
160 W LDMOS power transistor for industrial applications at frequencies from 700 MHz to
1000 MHz.
Table 1. Typical performance
Typical RF performance at Tcase = 25 C in a class-AB production test circuit.
Test signal
f
VDS
PL(AV)
Gp
D
(MHz)
(V) (W)
(dB) (%)
2-carrier W-CDMA
920 to 960
32 32
22.5 27
ACPR
(dBc)
41[1]
[1] Test signal: 3GPP; test model 1; 64 DPCH; PAR = 7.5 dB at 0.01 % probability on CCDF per carrier; carrier
spacing 5 MHz.
1.2 Features and benefits
Easy power control
Integrated ESD protection
Excellent ruggedness
High efficiency
Excellent thermal stability
Designed for broadband operation (700 MHz to 1000 MHz)
Internally matched for ease of use
Compliant to Directive 2002/95/EC, regarding restriction of hazardous substances
(RoHS)
1.3 Applications
RF power amplifiers for ISM applications in the 700 MHz to 1000 MHz frequency range
1 Page NXP Semiconductors
BLF10M6160; BLF10M6LS160
Power LDMOS transistor
6. Characteristics
Table 6. DC characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
V(BR)DSS
VGS(th)
VGSq
IDSS
IDSX
IGSS
gfs
RDS(on)
drain-source breakdown voltage
gate-source threshold voltage
gate-source quiescent voltage
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state resistance
VGS = 0 V; ID = 0.72 mA
VDS = 10 V; ID = 216 mA
VDS = 32 V; ID = 1300 mA
VGS = 0 V; VDS = 32 V
VGS = VGS(th) + 3.75 V;
VDS = 10 V
VGS = 13 V; VDS = 0 V
VDS = 10 V; ID = 7.5 A
VGS = VGS(th) + 3.75 V;
ID = 6.3 A
Min Typ Max Unit
65 - - V
1.4 1.9 2.4 V
1.7 2.2 2.7 V
- - 5 A
30.6 39 - A
- - 450 nA
- 13.5 - S
- 0.1 -
Table 7. AC characteristics
Tj = 25 C unless otherwise specified.
Symbol Parameter
Conditions
Crs feedback capacitance VGS = 0 V; VDS = 32 V; f = 1 MHz
Min Typ Max Unit
- 4.2 - pF
Table 8. RF characteristics
Test signal: 2-carrier W-CDMA; PAR 7.5 dB at 0.01 % probability on CCDF; 3GPP test model 1;
1-64 DPCH; f1 = 922.5 MHz; f2 = 927.5 MHz; f3 = 952.5 MHz; f4 = 957.5 MHz; RF performance at
VDS = 32 V; IDq = 1200 mA; Tcase = 25 C; unless otherwise specified; in a class-AB production test
circuit.
Symbol Parameter
Conditions
Min Typ Max Unit
Gp
RLin
D
ACPR
power gain
input return loss
drain efficiency
adjacent channel power ratio
PL(AV) = 32 W
PL(AV) = 32 W
PL(AV) = 32 W
PL(AV) = 32 W
21 22.5 -
dB
- 8 5.5 dB
25 27 -
%
- 41 38 dBc
7. Test information
7.1 Ruggedness in class-AB operation
The BLF10M6160 and BLF10M6LS160 are capable of withstanding a load mismatch
corresponding to VSWR = 10 : 1 through all phases under the following conditions:
VDS = 32 V; IDq = 1200 mA; PL = 160 W (CW); f = 960 MHz.
BLF10M6160_BLF10M6LS160
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
3 of 12
3Pages NXP Semiconductors
BLF10M6160; BLF10M6LS160
Power LDMOS transistor
7.3.2 2-Tone CW
24
Gp
(dB)
22
20
Gp
ηD
001aah476
60
ηD
(%)
40
20
0
IMD
(dBc)
−20
−40
−60
001aah477
IMD3
IMD5
IMD7
18
0
0
40 80 120 160 200
PL(PEP) (W)
−80
0
80 160 240
PL(PEP) (W)
Fig 4.
VDS = 32 V; IDq = 1200 mA; f1 = 959.95 MHz;
f2 = 960.05 MHz.
Power gain and drain efficiency as function of
peak envelope power load power; typical
values
Fig 5.
VDS = 32 V; IDq = 1200 mA; f1 = 959.95 MHz;
f2 = 960.05 MHz.
Intermodulation distortion as a function of
peak envelope power load power;
typical values
7.3.3 2-Carrier W-CDMA
24
Gp
(dB)
23
22
21
20
001aaj516
50
0
ηD
(%)
ACPR
(dBc)
40
Gp −20
30
ηD
−40
20
−60
10
001aah479
19
0
0
20 40 60
PL(AV) (W)
−80
0
20 40 60
PL(AV) (W)
Fig 6.
VDS = 32 V; IDq = 1200 mA; f1 = 952.5 MHz;
f2 = 957.5 MHz; carrier spacing 5 MHz.
Power gain and drain efficiency as function of
average output power; typical values
Fig 7.
VDS = 32 V; IDq = 1200 mA; f1 = 952.5 MHz;
f2 = 957.5 MHz; carrier spacing 5 MHz.
Adjacent power channel ratio as a function of
average output power; typical values
BLF10M6160_BLF10M6LS160
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 24 June 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
6 of 12
6 Page | |||
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部品番号 | 部品説明 | メーカ |
BLF10M6LS160 | Power LDMOS transistor | NXP Semiconductors |