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PDF ISL78236 Data sheet ( Hoja de datos )

Número de pieza ISL78236
Descripción Dual 3A Current Sharing 2.5MHz High Efficiency Synchronous Buck Regulator
Fabricantes Intersil 
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No Preview Available ! ISL78236 Hoja de datos, Descripción, Manual

Dual 3A Current Sharing 2.5MHz High Efficiency
Synchronous Buck Regulator
ISL78236
The ISL78236 is a dual output 3A/3A integrated FET buck
regulator for point-of-load power applications. The supply
voltage range is from 2.8V to 6V, allowing for the use of a
single Li+ cell, three NiMH cells or a regulated 3V/5V bus
input. It is optimized for regulating output voltages down to
1.2V. Each channel provides an output current up to 3A which
can be combined to form a single 6A output in current sharing
mode. The two channels operate 180° out-of-phase to reduce
input RMS current and EMI.
The ISL78236 integrates a pair of low ON-resistance P-channel
and N-channel internal MOSFETs to maximize efficiency and
minimize external component count. It can operate up to
100% duty cycle to maximize operating life as battery voltage
drops out. When supplying 3A on each channel, the 100% duty
cycle operation limits the dropout voltage to less than 250mV.
Other features include internal digital soft-start, independent
channel enable for power sequencing, overcurrent protection,
and thermal shutdown.
The ISL78236 is offered in a 24 Ld 4mmx4mm QFN package
with 1mm maximum height. The complete converter occupies
less than 1.5cm2 area.
The ISL78236 is AEC - Q100 qualified and is rated for the
automotive temperature range (-40°C to +105°C).
Features
• Dual 3A/3A independent outputs
• 2.5MHz synchronous buck regulator with internal MOSFETs
up to 95% efficiency
• 2% voltage reference accuracy over-temperature
• 6A current sharing mode operation
• Internal or external compensation
• Peak current limiting and hiccup mode short circuit
protection
• Reverse overcurrent protection
• Over-temperature protection shutdown
• AEC - Q100 qualified
Applications
• DSP and embedded processor power supply
• Infotainment system power
• Automotive point of load power
Related Literature
AN1927, “ISL78236DUALEVAL1Z Dual 3A Low Quiescent
Current High Efficiency Synchronous Buck Regulator”
AN1928, “ISL78236CRSHEVAL1Z Current Sharing 6A Low
Quiescent Current High Efficiency Synchronous Buck
Regulator”
3V INPUT
EN1
PG1
EN2
PG2
ISL78236
LX1
LX2
1.2V/3A
FPGA OR DSP
POWER
1.5V/3A
ASIC POWER
FIGURE 1. TYPICAL APPLICATION BLOCK DIAGRAM: DUAL OUTPUT
3A/3A BUCK REGULATOR
100
2.5VOUT
90
80
70
1.2VOUT
1.5VOUT
1.8VOUT
60
50
40
0.0 0.5 1.0 1.5 2.0
2.5 3.0
OUTPUT LOAD (A)
FIGURE 2. EFFICIENCY vs LOAD CURRENT, VIN = 3.3V, TA = +25°C
April 28, 2014
FN8624.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2014. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 page




ISL78236 pdf
Block Diagram
ISL78236
COMP
SS
EN1
SOFT-
S TSATTRA TR
SHUTDOWN
BANDGAP 0.8V
+
EAMP
27pF
390k
+
PWM
COMP
FB1
1.6k
3pF
SLOPE
COMP
+
0.5V
SCP
+
0.3pF
0.864V
+
PG1
SGND
V IN 1
0.736V
+
1M
1ms
DELAY
THERMAL
SHUTDOWN
O SCILLATOR
SHUTDOWN
EN2
SS SOFT-
SSTTATARRT
SHUTDOWN
BANDGAP 0.8V
+
EAMP
27pF
390k
0 .3 p F
+
COMP
FB2
1.6k
3pF
SLOPE
COMP
+
0.5V
SCP
+
0.864V
+
PG2
SGND
VIN2
0.736V
+
1M
1ms
DELAY
SHUTDOWN
PWM
L O G IC
CONTROLLER
P R O T E C T IO N
D R IV E R
+
CSA1
OCP
THRESHOLD
L O G IC
SHUTDOWN
PWM
L O G IC
CONTROLLER
PROTECTIO N
D R IV E R
+
CSA2
Submit Document Feedback
5
VIN1
LX1
PGND
SYNC
VIN2
LX2
PGND
FN8624.0
April 28, 2014

5 Page





ISL78236 arduino
ISL78236
Typical Operating Performance for Dual PWM Operation
Unless otherwise noted, operating conditions are: TA = +25°C; VOUT1 = 1.8V; VOUT2 = 1.8V; IOUT1 = 0A to 3A; IOUT2 = 0A to 3A, L1 = L2 = 0.6µH,
COUT1 = 2x22µF, COUT2 = 2x22µF, FSW = 2.5MHz. (Continued)
LX1 2V/DIV
200ns/DIV
VIN = 5V
LX2 2V/DIV
200ns/DIV
VIN = 5V
VOUT RIPPLE 20mV/DIV
IL1 2A/DIV
FIGURE 11. STEADY STATE OPERATION AT NO LOAD CHANNEL 1
VOUT RIPPLE 20mV/DIV
IL2 2A/DIV
FIGURE 12. STEADY STATE OPERATION AT NO LOAD CHANNEL 2
LX1 2V/DIV
200ns/DIV
VIN = 5V
LX2 2V/DIV
200ns/DIV
VIN = 5V
VOUT RIPPLE 20mV/DIV
IL1 2A/DIV
FIGURE 13. STEADY STATE OPERATION AT 3A LOAD CHANNEL 1
VOUT RIPPLE 20mV/DIV
IL2 2A/DIV
FIGURE 14. STEADY STATE OPERATION AT 3A LOAD CHANNEL 2
VOUT1 RIPPLE 100mV/DIV
VIN = 5V
100µs/DIV
CH2 IOUT = 0A
VOUT2 RIPPLE 100mV/DIV
VIN = 5V
100µs/DIV
CH1 IOUT = 0A
IL1 2A/DIV
FIGURE 15. LOAD TRANSIENT CHANNEL 1
IL2 2A/DIV
FIGURE 16. LOAD TRANSIENT CHANNEL 2
Submit Document Feedback 11
FN8624.0
April 28, 2014

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