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PDF FDS5682 Data sheet ( Hoja de datos )

Número de pieza FDS5682
Descripción N-Channel Power Trench MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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No Preview Available ! FDS5682 Hoja de datos, Descripción, Manual

May 2008
FDS5682
N-Channel PowerTrench® MOSFET
60V, 7.5A, 21m
Features
„ rDS(ON) = 21m, VGS = 10V, ID = 7.5A
„ rDS(ON) = 26.5m, VGS = 4.5V, ID = 6.7A
„ High performance trench technology for extremely low
rDS(ON)
„ Low gate charge
General Description
This N-Channel MOSFET has been designed specifically to
improve the overall efficiency of DC/DC converters using
either synchronous or conventional switching PWM
controllers. It has been optimized for low gate charge, low
rDS(ON) and fast switching speed.
„ High power and current handling capability
Applications
„ DC/DC converters
Branding Dash
1
2
3
4
SO-8
5
54
63
72
81
©2008 Fairchild Semiconductor Corporation
FDS5682 Rev. A1
1
www.fairchildsemi.com

1 page




FDS5682 pdf
Typical Characteristics TA = 25°C unless otherwise noted
50
If R = 0
tAV = (L)(IAS)/(1.3*RATED BVDSS - VDD)
If R 0
tAV = (L/R)ln[(IAS*R)/(1.3*RATED BVDSS - VDD) +1]
10
STARTING TJ = 25oC
STARTING TJ = 150oC
1
0.01
0.1 1 10
tAV, TIME IN AVALANCHE (ms)
100
NOTE: Refer to Fairchild Application Notes AN7514 and AN7515
Figure 5. Unclamped Inductive Switching
Capability
25
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20 VDD = 15V
TJ = 25oC
15
10
TJ = 150oC
5
TJ = -55oC
0
1.5
2.0 2.5 3.0
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6. Transfer Characteristics
3.5
25
VGS = 10V
20
VGS = 5V
15
VGS = 3V
10
5
0
0
TA = 25oC
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 2.5V
0.2 0.4 0.6
VDS, DRAIN TO SOURCE VOLTAGE (V)
0.8
Figure 7. Saturation Characteristics
80
60
ID = 7.5A
40
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
20
ID = 1A
0
2
468
VGS, GATE TO SOURCE VOLTAGE (V)
10
Figure 8. Drain to Source On Resistance vs Gate
Voltage and Drain Current
2.0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
1.25
VGS = VDS, ID = 250µA
1.5 1.00
1.0 0.75
0.5
-80
VGS = 10V, ID = 7.5A
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 9. Normalized Drain to Source On
Resistance vs Junction Temperature
0.50
-80
-40 0
40 80 120
TJ, JUNCTION TEMPERATURE (oC)
160
Figure 10. Normalized Gate Threshold Voltage vs
Junction Temperature
FDS5682 Rev. A1
5 www.fairchildsemi.com

5 Page





FDS5682 arduino
SPICE Thermal Model
REV May 2005
FDS5682
Copper Area =1.0 in2
CTHERM1 TH 8 2.0e-3
CTHERM2 8 7 5.0e-3
CTHERM3 7 6 1.0e-2
CTHERM4 6 5 4.0e-2
CTHERM5 5 4 9.0e-2
CTHERM6 4 3 2e-1
CTHERM7 3 2 1
CTHERM8 2 TL 3
RTHERM1 TH 8 1e-1
RTHERM2 8 7 5e-1
RTHERM3 7 6 1
RTHERM4 6 5 5
RTHERM5 5 4 8
RTHERM6 4 3 12
RTHERM7 3 2 18
RTHERM8 2 TL 25
SABER Thermal Model
SABER thermal model FDS5682
Copper Area = 1.0 in2
template thermal_model th tl
thermal_c th, tl
{
ctherm.ctherm1 th 8 =2.0e-3
ctherm.ctherm2 8 7 =5.0e-3
ctherm.ctherm3 7 6 =1.0e-2
ctherm.ctherm4 6 5 =4.0e-2
ctherm.ctherm5 5 4 =9.0e-2
ctherm.ctherm6 4 3 =2e-1
ctherm.ctherm7 3 2 1
ctherm.ctherm8 2 tl 3
rtherm.rtherm1 th 8 =1e-1
rtherm.rtherm2 8 7 =5e-1
rtherm.rtherm3 7 6 =1
rtherm.rtherm4 6 5 =5
rtherm.rtherm5 5 4 =8
rtherm.rtherm6 4 3 =12
rtherm.rtherm7 3 2 =18
rtherm.rtherm8 2 tl =25
}
RTHERM1
RTHERM2
RTHERM3
RTHERM4
RTHERM5
RTHERM6
RTHERM7
RTHERM8
COMPONANT
CTHERM6
CTHERM7
CTHERM8
RTHERM6
RTHERM7
RTHERM8
0.04 in2
1.2e-1
0.5
1.3
26
39
55
TABLE 1. THERMAL MODELS
0.28 in2
0.52 in2
1.5e-1
2.0e-1
1.0 1.0
2.8 3.0
20 15
24 21
38.7 31.3
th JUNCTION
CTHERM1
8
CTHERM2
7
CTHERM3
6
CTHERM4
5
CTHERM5
4
CTHERM6
3
CTHERM7
2
CTHERM8
tl CASE
0.76 in2
2.0e-1
1.0
3.0
13
19
29.7
1.0 in2
2.0e-1
1.0
3.0
12
18
25
FDS5682 Rev. A1
11 www.fairchildsemi.com

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