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PDF LV5710GP Data sheet ( Hoja de datos )

Número de pieza LV5710GP
Descripción Power Supply for Charge Pump
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No Preview Available ! LV5710GP Hoja de datos, Descripción, Manual

Ordering number : ENA1899A
LV5710GP
Bi-CMOS LSI
Power Supply for Charge Pump
for Camera Sensor
http://onsemi.com
Overview
The LV5710GP is power supply for charge pump for camera sensor.
Functions
Regulating the 5V input by boosting it three-fold with the charge pump
to the specified voltage.
Output voltage variable with external resistor.
Soft start function incorporated, which reduces the rush current at start
of charge pump.
Timer-latch type short-circuit protective function incorporated.
VCT20 3x3, 0.5P
Specifications
Absolute Maximum Ratings at Ta = 25C
Parameter
Maximum supply voltage
Allowable power dissipation
Operating temperature
Storage temperature
Symbol
VDD max
Pd max
Topr
Tstg
Conditions
with specified substrate *
* : Specified substrate : 114.3mm76.1mm1.6mm, glass epoxy board
Ratings
6.0
0.55
20 to +80
40 to +125
Unit
V
W
C
C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ratings at Ta = 25C
Parameter
Supply voltage
Input “H” voltage
Input “L” voltage
Symbol
VDD
VINH
VINL
EN pin
EN pin
Conditions
min
4.5
1.5
0.1
Ratings
typ
max
5.5
VDD
0.4
Unit
V
V
V
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
ORDERING INFORMATION
See detailed ordering and shipping information on page 7 of this data sheet.
Semiconductor Components Industries, LLC, 2014
August, 2014
80614HK/D0810SY 20101125-S00002 No.A1899-1/7

1 page




LV5710GP pdf
Block Diagram
LV5710GP
PVDD
4.7μF
PGND
vref
SVDD
1μF
SGND
S0
S1
EN
active
bandgap
voltage
reference
Timing
Control
2bit MUX
Divider
2MHz
OSC
Sequence Control Block
Step-Up
Circuit
RO
1μF
FB
CPO
1μF
C2P
C1P
0.22μF
C1M
C2M
Equivalent Circuit Diagram
PVDD
VIN = 4.5V to
5.5V
CLK
M1
C1P
M2
M3
C2P
+3VIN
CPO
+
-
VIN
+
-
2VIN3VIN
C1M
Vref +
-
RO
VOUT
C2M
FB
No.A1899-5/7

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