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LV5044V の電気的特性と機能

LV5044VのメーカーはON Semiconductorです、この部品の機能は「DC-DC Converter Controller」です。


製品の詳細 ( Datasheet PDF )

部品番号 LV5044V
部品説明 DC-DC Converter Controller
メーカ ON Semiconductor
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LV5044V Datasheet, LV5044V PDF,ピン配置, 機能
Ordering number : ENA0534
LV5044V
Bi-CMOS IC
2ch step-down circuit
DC-DC Converter Controller
http://onsemi.com
Overview
The LV5044V is a high efficiency, 2-channel, step-down, DC-DC converter controller IC adopting a synchronous
rectifying system. Incorporating numerous functions on a single chip with easy external setting, it can be used for a
wide variety of applications. The device is optimal for use in multi-output power supply systems which are used in
LCD-TVs, DVD recorders, game machines, high-end office products, etc.
Features
Provides dual step-down DC-DC converter controller circuits integrated on the same chip.
Provides an input UVLO circuit, an overcurrent detection function, an overtemperature detection function, soft
start/soft stop functions, and a startup delay circuit.
Output voltage monitoring functions (power good as well as OVP and UVP with timer latch functions)
180° interleaved operation between phase 1 and phase 2 (supports multiphase drive in 2-phase parallel operation
mode).
Supports synchronous operation between different devices (supports master/slave operation when multiple devices
are used).
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Supply voltage
Peak output current
Allowable power dissipation
VIN
IOUT
Pd max
*1
18
±1.0
1
Operating temperature
Topr
-20 to +85
Storage temperature
Tstg
-55 to +150
Allowable pin voltage *2
1 HDRV1,2
18
CBOOT1,2
2 HDRV1,2 ,CBOOT1,2
6.5
to SW
3 VIN,
ILIM1,2
18
RSNS1,2, SW1,2
PGOOD1,2
4 VLIN5
6.5
VDD, LDRV1,2
5 COMP1,2, FB1,2
VLIN5+0.3
SS1,2, UV_DELAY
TD1,2, CT
CLKO
*1 Board size: 114.3×76.1×1.6mm3, glass epoxy board.
*2 Allowable pin voltages are referenced to the SGND and PGND pins, excluding No.2. No.2 Voltages are referenced to the SW pin.
Unit
V
A
W
°C
°C
V
V
V
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Semiconductor Components Industries, LLC, 2013
August, 2013
N2806 MS PC 20060927-S00009 No.A0534-1/7

1 Page





LV5044V pdf, ピン配列
Continued from preceding page.
Parameter
Oscillator
Oscillator frequency
Oscillator frequency range
Maximum on duty
Minimum on time
Sawtooth wave high side voltage
Sawtooth wave low side voltage
On time difference between
channels 1 and 2
Error Amplifier
Error amplifier input current
COMP pin source current
COMP pin sink current
Error amplifier gm
Current detection amplifier gain
Logic Output
Sink current in the power good
low state
Leakage current in the power good
high state
TD pin threshold level
TD pin open voltage
TD pin source current during charge
TD pin sink current during discharge
CLKO high-level voltage
CLKO low-level voltage
Protection Functions
VIN UVLO release voltage
UVLO hysteresis
Symbol
fOSC
fOSC op
DON max
TON min
VsawH
VsawL
ΔTdead
IFB
ICOMPSC
ICOMPSK
gm
GISNS
IpwrgdL
IpwrgdH
VONTD
VTDH
ITDSC
ITDSK
VCLKOH
VCLKOL
VUVLO
ΔVUVLO
LV5044V
Conditions
CT = 130pF
CT = 130pF
CT = 130pF
fOSC = 300kHz
fOSC = 300kHz
VPGOOD = 0.4V
VPGOOD = 12V
When the TD pin is stepped up
VIN – VLIN5 open.
ICLKO = 1mA
ICLKO = 1mA
Package Dimensions
unit : mm
3191B
9.75
30 16
1.2
1.0
0.8
0.6
1
0.65
(0.33)
15
0.22
0.15
0.4
0.2
0
-20
Ratings
Unit
min typ max
280 330 380 kHz
250 1100 kHz
82 %
100 nS
2.2 2.6 V
1 1.2 V
5%
-200
18
500
1.5
0.5
1.5
4.5
-1.8
0.8
0.7VLIN5
3.5
-100
-100
100
700
2.0
200 nA
-18 μA
μA
900 μmho
2.5 dB
1.0 mA
10 μA
2.4 3.5 V
5.0 5.5 V
-3.5 -7.0 μA
2 5 mA
V
0.3VLIN5
V
4.1 4.3 V
0.2 V
Pd max -- Ta
Specified Substrate (114.3×76.1×1.6mm3)
1.00 glass epoxy.
0.52
0 20 40 60 80 100
Ambient temperture, Ta -- °C OMG0618
SANYO : SSOP30(275mil)
No.A0534-3/7


3Pages


LV5044V 電子部品, 半導体
LV5044V
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
VDD
LDRV1
HDRV1
SW1
CBOOT1
VLIN5
COMP1
FB1
RSNS1
ILIM1
TD1
SS1
PGOOD1
UV_DELAY
VIN
CLKO
Function
Gate drive power supply for the external low side MOSFETs. Connect this pin to VLIN5 through a filter.
Channel 1 external low side MOSFET gate drive.
This pin is also used as the signal input for short through prevention for the high and low side MOSFETs.
HDRV cannot be turned on unless this pin's voltage goes below 1V.
Channel 1 external high side MOSFET gate drive.
This pin is connected to the channel 1 switching node.
The external high side MOSFET source and the low side MOSFET drain are connected to this pin.This pin becomes the
return current route of pin HDRV. The drain of the discharging MOSFET used for the soft stop function is connected
internal in the IC (typ.15Ω). This pin is also used as the signal input for short through prevention for the high and low side
MOSFETs. LDRV cannot be turned on unless this pin's voltage goes below 1V referenced to PGND.
Channel 1 bootstrap capacitor connection.
The high side MOSFET gate drive power is supplied from this pin. This pin is connected to VDD through a diode and to
SW1 through the bootstrap capacitor.
Internal 5V regulator output.
The current is supplied from VIN. The power supply for the IC internal control circuits is also supplied from this pin. A
bypass capacitor (6.8μF) is required between this pin and SGND. This pin is monitored by the UVLO function and the IC
starts operating when it first rises above 4.0V. (After starting, the IC will only stop if this voltage falls below 3.8V.)
Channel 1 phase compensation.
The output of the internal transconductance amplifier is connected to this pin. The external phase compensation circuit
between this pin and SGND.
Channel 1 feedback input.
The transconductance amplifier inverting () input is connected to this pin. Provide the feedback potential to this pin by
voltage dividing the output voltage. The converter operates so that this pin goes to the internal reference voltage VREF,
0.8V. This pin is also monitored by both the UVP comparator and the OVP comparator. If this pin voltage falls to under
87% of the set voltage, the PGOOD1 pin will go low and the UV_TIMER will operate. If this pin voltage rises to over 117%
of the set voltage, the IC will latch in the off state.
Input for the channel 1 side overcurrent detection comparator and current detection amplifier. When resistor detection is
used, connect the low side of the current detection resistor inserted between VIN and the drain of the external high side
MOSFET to this pin. These connections must be wired independently so that the shared impedance with the main current
with respect to the detected voltage does not affect this circuit.
Connection to the channel 1 overcurrent detection trip point.
A 8.3μA (ILIM) sink constant-current supply is connected internal in the IC, and the overcurrent detection voltage ILIM ×
RLIM is generated by connecting the resistor RLIM between this pin and VIN. The voltage between VIN and ILIM is
compared to the voltage across the terminals of either the current detection resistor RSNS or the high side MOSFET to
detect the overcurrent state.
Channel 1 startup delay connection.
The time until the IC starts up after the power-on reset (POR) is cleared is set by the capacitor connected between this pin
and SGND. After the POR state is cleared, the external capacitor is charged by a 3.5μA constant current supplied
internally by the IC. The IC starts operation when the voltage on this pin exceeds 2.4V. The IC goes to the standby state
when the voltage on this pin is under 2.4V. If no external capacitor is connected to this pin, the IC will start as soon as the
power-on reset is cleared.
Channel 1 soft start capacitor connection.
After the power-on reset (POR) is cleared and the TD pin voltage exceeds 2.4V, this capacitor is charged by a 3.5μA
internal constant current supply from the SS1 pin. This pin is connected to the transconductance amplifier's noninverting
(+) input, and the ramp waveform of the SS1 pin is reflected in the ramped-up output waveform. After the UV_DELAY time
out and the POR operates, this capacitor is discharged by the SS pin.
Channel 1 power good pin.
An IC internal 28V MOSFET open drain is connected to this pin. This pin outputs a low level if the channel 1 output voltage
falls more than -13% relative to the set voltage. There is a hysteresis of about VREF × 1.5%.
Channel 1 and channel 2 common UVP delay connection.
The time until the IC switches off after the UVP state is detected is set by the capacitor connected between this pin and
SGND. If either the channel 1 or channel 2 output voltage falls under -80% of the set voltage, an IC internal 8.6μA
constant current source charges the external capacitor connected to this pin. When the voltage on this pin exceeds 2.4V,
the IC switches off. If no external capacitor is connected, the IC turns off immediately upon detection of the UVP state.
IC power supply.
Clock output.
This pin outputs a clock signal synchronized with the CT pin oscillator waveform. When two or more LV5044V chips are
operated in synchronization, connect the CT pin of the slave device to the SLKO pin of the master device. If two or more
devices are operated in synchronization and the Td pin is used to change the startup timing between the devices, the
device that starts the soonest will be the master.
Continued on next page.
No.A0534-6/7

6 Page



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共有リンク

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部品番号部品説明メーカ
LV5044V

DC-DC Converter Controller

Sanyo Semicon Device
Sanyo Semicon Device
LV5044V

DC-DC Converter Controller

ON Semiconductor
ON Semiconductor


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