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PDF EMI6183 Data sheet ( Hoja de datos )
| Número de pieza | EMI6183 | |
| Descripción | Common Mode Filter | |
| Fabricantes | ON Semiconductor | |
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EMI6183
Common Mode Filter with
ESD Protection
Product Description
The EMI6183 is an Integrated Common Mode Filter in a 3x2,
6−bump, 0.4 mm pitch, CSP form factor for the elimination of
common mode noise in high speed data line applications such as
USB2.0 and other LVDS type applications. ESD protection is
integrated into the Common mode filter for superior protection and
significant part count reduction.
Features
• Single Integrated Package for Common Mode Filter (CMF) and ESD
Protection for High Speed Data Lines
• High Differential Mode Bandwidth Cutoff Frequency for Best Signal
Integrity
• 3 x 2, 6−bump, 0.4 mm pitch CSP
• Provides ESD protection to IEC61000−4−2 Level 4, ±8 kV Contact
Discharge at External Pins and Stand−Alone C2 Pin
• Provides ESD protection to IEC61000−4−2 Level 1, ±2 kV Contact
Discharge at Internal Pins
• Low Channel Input Capacitance
• Coated for Improved Reliability at Assembly
• These Devices are Pb−Free and are RoHS Compliant II Packaging
Applications
• High Speed Differential Data Lines
• USB2.0
• LVDS
http://onsemi.com
MARKING
DIAGRAM
WLCSP6
CASE 567GA
61 = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package
61
AYW
G
SIMPLIFIED SCHEMATIC
PIN CONNECTIONS
© Semiconductor Components Industries, LLC, 2012
October, 2012 − Rev. 0
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
1 Publication Order Number:
EMI6183/D
1 page  
EMI6183
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the voltage that an IC will be exposed to during an ESD event to as low
a voltage as possible. The ESD clamping voltage is the voltage drop across the ESD protection diode during an ESD event per
the IEC61000−4−2 waveform. Since the IEC61000−4−2 was written as a pass/fail spec for larger systems such as cell phones
or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level.
ON Semiconductor has developed a way to examine the entire voltage waveform across the ESD protection diode over the time
domain of an ESD pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all ESD protection
diodes. For more information on how ON Semiconductor creates these screenshots and how to interpret them please refer to
On Semiconductor Application Notes AND8307/D and AND8308/D.
IEC61000−4−2 Spec.
Test
Voltage
First Peak
Current Current at
Current at
IEC61000−4−2 Waveform
Ipeak
100%
Level
(kV)
(A) 30 ns (A) 60 ns (A)
90%
1 2 7.5 4
2
2 4 15 8
3 6 22.5 12
4
6
I @ 30 ns
48
30 16
8
I @ 60 ns
10%
tP = 0.7 ns to 1 ns
ESD Gun
TVS
Oscilloscope
50 W
Cable
50 W
Figure 8. Diagram of ESD Test Setup
http://onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet EMI6183.PDF ] | |
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