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AS1854 の電気的特性と機能

AS1854のメーカーはAkros Siliconです、この部品の機能は「Digital Power PoE PD Controllers」です。


製品の詳細 ( Datasheet PDF )

部品番号 AS1854
部品説明 Digital Power PoE PD Controllers
メーカ Akros Silicon
ロゴ Akros Silicon ロゴ 




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AS1854 Datasheet, AS1854 PDF,ピン配置, 機能
AS1854/44/34/24 Digital Power PoE PD Controllers
with HV Isolation and Quad DC-DC Outputs
GENERAL DESCRIPTION
The AS18x4 product family integrates Akros GreenEdge™ Isolation
technology with next generation Power-over-Ethernet (PoE) PD and
power conversion technology to deliver groundbreaking power
integration, and enable a new range of Digital Power PoE PD
capabilities and solutions.
A Type 1 (IEEE® 802.3af) and Type 2 (IEEE® 802.3at) compliant PD
is integrated with high-voltage isolation and quad-output digital
power DC-DC converters – resulting in a complete PoE & Power
management solution in a single device with minimal external
components.
In addition to enabling digital PoE power conversion, Akros
GreenEdge™ isolation enables direct digital management of both
isolated Primary power and Secondary system power for real time
end-to-end Green Power application capabilities.
TYPICAL APPLICATIONS
Voice-over-IP (VoIP) phones
Wireless LAN & WiMAX access points (WAP)
Pan, Tilt, Zoom (PTZ) Cameras, IP cameras
Thin-client and notebook computers
Fiber-to-the-home (FTTH) terminals
Point-of-sale (PoS) terminals, RFID readers
ORDERING INFORMATION
The AS18x4 family includes four pin-compatible devices, all available
in 64-lead QFN Reduction of Hazardous Substance (RoHS)
compliant packages.
Part #
Type 1 Type 2 Hardware
PD PD Mode
AS1824*
x
x
AS1834*
x
x
AS1844*
x
x
x
AS1854*
x
x
x
* Industrial Temperature Range, -40°C to 85°C
Software
Mode
x
x
Pwr In
(W)
13
13
13/30
13/30
FEATURES
   PoE PD Controller 
Type 1 and Type 2 IEEE® 802.3af & 802.3at Compliant PD
Automatic PoE-Plus (Type 2) detection in HW and
I2C Modes
Low Resistance PD Power FET Switch (0.5typical)
PrimarySide DCDC Controller 
High-efficiency DC-DC Controller with Digital Optimization
Primary-Secondary High-voltage integrated Digital Isolation
Programmable Primary Clock Frequency
Local-power operation down to 9.5V
SecondarySide Power Outputs 
Programmable PWM Frequencies synched to External Clock
Output #1: Sync Controller with programmable power FET
timing for high efficiency at both light and full load
Outputs #2 & #3: Buck Regulators w/2A FETs
Output #4: DC-DC Controller for Buck, Boost, or LED Boost
platform applications
EMC Compliance and Protection
Slew-rate-controlled power drivers
Multi-phased PWM clocking, with External Sync clock option
Optional spread-spectrum clocking available for all PWMs
Over-current, Under/Over-voltage and Short-circuit Protection
High-temperature warning and shutdown
Meets IEC 61000-4-2/3/4/5/6, IEC60747, IEC 60950, DIN
EN60747-5-2 (VDE0884), & UL1577 requirements for EMC
compliance and basic isolation to 2120 VDC (1500 VRMS)
100V Process for PoE transient voltage robustness
SIMPLIFIED APPLICATION DIAGRAM
Akros Silicon, Inc.
6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA
408.746.9000 http://www.AkrosSilicon.com

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AS1854 pdf, ピン配列
AS1854/44/34/24
OVER-VOLTAGE PROTECTION ..............................................................................................................................................26
RF & EMI FILTERING ................................................................................................................................................................26
POWER OUTPUTS #2 AND #3 .................................................................................................................................................26
LOOP FEEDBACK AND COMPENSATION ..............................................................................................................................27
CURRENT-LIMIT AND CURRENT SENSE ...............................................................................................................................27
OVER-VOLTAGE PROTECTION ..............................................................................................................................................27
POWER OUTPUT #4 .................................................................................................................................................................27
COMPENSATION AND LOOP FEEDBACK ..............................................................................................................................28
CURRENT-LIMIT AND CURRENT SENSE ...............................................................................................................................29
OVER-VOLTAGE PROTECTION ..............................................................................................................................................29
HARDWARE MODE OPERATION.............................................................................................................................................29
DEVICE INITIALIZATION & HARDWARE MODE SELECTION ................................................................................................29
HW MODE POWER OUTPUT CONTROLS ..............................................................................................................................29
HW MODE POWER OUTPUT SEQUENCING ..........................................................................................................................29
HW MODE POWER MONITORING (PGOOD) ..........................................................................................................................30
HW MODE WATCHDOG TIMER ...............................................................................................................................................30
WATCHDOG CONFIGURATION ...............................................................................................................................................30
WATCHDOG SERVICE .............................................................................................................................................................30
WATCHDOG TIMEOUT.............................................................................................................................................................30
HW MODE GENERAL-PURPOSE I/O OPERATION .................................................................................................................30
SOFTWARE MODE OPERATION .............................................................................................................................................31
DEVICE INITIALIZATION AND SOFTWARE MODE SELECTION ............................................................................................31
SW MODE POWER OUTPUT CONTROLS...............................................................................................................................31
SW MODE POWER STATUS MONITORING (PGOOD) ...........................................................................................................31
HISTORY REGISTER ................................................................................................................................................................32
PD VOLTAGE AND CURRENT MEASUREMENTS ..................................................................................................................32
PD OVER-CURRENT ALARM THRESHOLD ............................................................................................................................32
SW MODE POWER MARGINING .............................................................................................................................................32
SW MODE EMI PERFORMANCE CONTROL ...........................................................................................................................32
PWM CLOCKS - PRBS RANDOMIZATION...............................................................................................................................32
PWM CLOCKS - FRACTIONAL-N .............................................................................................................................................32
SW MODE GENERAL-PURPOSE I/O & ADC ...........................................................................................................................32
GENERAL-PURPOSE I/O PINS ................................................................................................................................................33
GENERAL-PURPOSE ADC (ADCIN PIN) .................................................................................................................................33
SW MODE WATCHDOG TIMER OPERATION .........................................................................................................................33
WATCHDOG TIMER MODES....................................................................................................................................................33
WATCHDOG TIMER OPERATION............................................................................................................................................33
WATCHDOG ENABLE...............................................................................................................................................................33
SW MODE INTERRUPT OPERATION ......................................................................................................................................34
INTERRUPT MASKING .............................................................................................................................................................34
INTERRUPT STATUS................................................................................................................................................................34
I2C INTERFACE ........................................................................................................................................................................34
START/STOP TIMING ...............................................................................................................................................................34
DATA TIMING ............................................................................................................................................................................34
ACKNOWLEDGE (ACK) ............................................................................................................................................................34
DEVICE ADDRESS CONFIGURATION.....................................................................................................................................35
DEVICE ADDRESS/OPERATION WORD .................................................................................................................................36
REGISTER ADDRESS WORD ..................................................................................................................................................36
DATA WORD .............................................................................................................................................................................36
WRITE CYCLE...........................................................................................................................................................................36
READ CYCLE ............................................................................................................................................................................36
REGISTER DESCRIPTIONS .....................................................................................................................................................37
POWER OVER ETHERNET OVERVIEW ..................................................................................................................................46
POWER FEED ALTERNATIVES FOR 10/100/1000M ETHERNET SYSTEMS.........................................................................46
POE+: THE NEXT GENERATION .............................................................................................................................................47
POE POWER-ON SEQUENCE .................................................................................................................................................48
PACKAGE SPECIFICATIONS ...................................................................................................................................................50
CONTACT INFORMATION........................................................................................................................................................51
IMPORTANT NOTICES .............................................................................................................................................................51
Akros Silicon, Inc.
6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA
408.746.9000 http://www.AkrosSilicon.com
3


3Pages


AS1854 電子部品, 半導体
AS1854/44/34/24
PIN ASSIGNMENTS AND DESCRIPTIONS
Figure 1 - AS18x4 Pin Assignments
Table 1 - AS18x4 Signal Descriptions - Primary Side
Pin
Name
I/O1 Description
Primary-Side: PD Controller
15
48VIN
P AS18x4 startup power input.
Paddle #1 48RTN
Input power return. One of three bottom side device connections, 48RTN (Paddle #1) is
P connected to the internal PD Power MOSFET source. 48RTN is connected to 48N
(Paddle #2) via this internal inrush current limiting power MOSFET.
Paddle #2
48N
Primary-side Transformer power return. One of three bottom side device connections,
P
48N (Paddle #2) provides the power return for the DC-DC controller transformer primary.
48N is connected to the internal PD Power MOSFET drain. 48N is connected to 48RTN
via this internal inrush current limiting power MOSFET.
Local Power Enable Input. Enables use of local power for the DC-DC controller and
disables PD functions. When activated this disables the PoE PD signature capability that
normally uses the RSIG signature resistor.
16
LDET
D, I
Refer to Figure 3 for a typical LDET circuit configuration and Table 16 for resistor values.
If Local power detection is not required, connect LDET to 48VIN. Note that LDET must
NOT be tied to 48RTN.
In Software mode, the LDET status can be read from the PD Status & Control Register.
PoE Classification Resistor. See Table 14 for resistor value. Connect the classification
19
RCLASS
A resistor between this input and the 48RTN (Paddle #1). The resistor is automatically
disconnected after a valid PD classification.
17
RSIG
A, I
PoE Signature Resistor. Connect a 26.7Ksignature resistor from RSIG to 48VIN. This
resistor is automatically disconnected after a valid PD detection.
Akros Silicon, Inc.
6399 San Ignacio Avenue, Suite 250, San Jose, CA 95119 USA
408.746.9000 http://www.AkrosSilicon.com
6

6 Page



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