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MMSF10N02ZのメーカーはON Semiconductorです、この部品の機能は「Power MOSFET ( Transistor )」です。 |
部品番号 | MMSF10N02Z |
| |
部品説明 | Power MOSFET ( Transistor ) | ||
メーカ | ON Semiconductor | ||
ロゴ | |||
このページの下部にプレビューとMMSF10N02Zダウンロード(pdfファイル)リンクがあります。 Total 10 pages
MMSF10N02Z
Preferred Device
Power MOSFET
10 Amps, 20 Volts
N−Channel SO−8
EZFETst are an advanced series of Power MOSFETs which
contain monolithic back−to−back zener diodes. These zener diodes
provide protection against ESD and unexpected transients. These
miniature surface mount MOSFETs feature low RDS(on) and true logic
level performance. They are capable of withstanding high energy in
the avalanche and commutation modes and the drain−to−source diode
has a very low reverse recovery time. EZFET devices are designed for
use in low voltage, high speed switching applications where power
efficiency is important.
• Zener Protected Gates Provide Electrostatic Discharge Protection
• Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Logic Level Gate Drive − Can Be Driven by Logic ICs
• Miniature SO−8 Surface Mount Package − Saves Board Space
• Diode Exhibits High Speed, With Soft Recovery
• IDSS Specified at Elevated Temperature
• Mounting Information for SO−8 Package Provided
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value
Unit
Drain−to−Source Voltage
Drain−to−Gate Voltage (RGS = 1.0 MΩ)
Gate−to−Source Voltage − Continuous
Drain Current − Continuous @ TA = 25°C
Drain Current − Continuous @ TA = 70°C
Drain Current − Single Pulse (tp ≤ 10 μs)
Total Power Dissipation @ TA = 25°C
(Note 1.)
VDSS
VDGR
VGS
ID
ID
IDM
PD
20 Vdc
20 Vdc
± 12 Vdc
10 Adc
7.0
80 Apk
2.5 Watts
Operating and Storage Temperature Range TJ, Tstg − 55 to
150
°C
Thermal Resistance − Junction to Ambient
RθJA
50 °C/W
Maximum Temperature for Soldering
TL 260 °C
1. When mounted on 1″ square FR−4 or G−10 board (VGS = 4.5 V, @
10 Seconds)
http://onsemi.com
10 AMPERES
20 VOLTS
RDS(on) = 15 mW
N−Channel
D
G
S
MARKING
DIAGRAM
8
SO−8
CASE 751
STYLE 12
10N02Z
LYWW
1
L = Location Code
Y = Year
WW = Work Week
PIN ASSIGNMENT
Source
Source
Source
Gate
18
27
36
45
Top View
Drain
Drain
Drain
Drain
ORDERING INFORMATION
Device
Package
Shipping
MMSF10N02ZR2
SO−8 2500 Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 4
1
Publication Order Number:
MMSF10N02Z/D
1 Page MMSF10N02Z
TYPICAL ELECTRICAL CHARACTERISTICS
20
18 VGS = 12V
4.5 V
16
2.7 V
1.9 V
14
1.8 V
12
10 1.7 V
8
1.6 V
6
1.5 V
4
2
TJ = 25°C
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
2
14
VDS ≥ 10 V
12 TJ = 25°C
10
8
6
4 100°C
2 25°C
TJ = −55°C
0
0 0.5 1 1.5 2
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
2.5
0.03
0.025
ID = 10 A
TJ = 25°C
0.02
0.015
0.01
0.005
0
2 3 4 5 6 7 8 9 10 11 12
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
0.03
0.025
TJ = 25°C
0.02
0.015
0.01
VGS = 2.7 V
4.5 V
0.005
0
1 3 5 7 9 11 13 15
ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.6
VGS =4.5 V
1.4 ID = 5 A
1.2
1
0.8
0.6
0.4
0.2
0
−50 −25
0 25 50 75 100
TJ, JUNCTION TEMPERATURE (°C)
125
Figure 5. On−Resistance Variation
with Temperature
150
10000
1000
VGS = 0 V
100
TJ = 125°C
100°C
10
25°C
1
0.1
0.01
0
2.5 5 7.5 10 12.5 15 17.5
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
20
Figure 6. Drain−to−Source Leakage Current
versus Voltage
http://onsemi.com
3
3Pages MMSF10N02Z
di/dt = 300 A/μs
Standard Cell Density
trr
High Cell Density
trr
ta
tb
t, TIME
Figure 11. Reverse Recovery Time (trr)
SAFE OPERATING AREA
The Forward Biased Safe Operating Area curves
define the maximum simultaneous drain−to−source
voltage and drain current that a transistor can handle
safely when it is forward biased. Curves are based upon
maximum peak junction temperature and a case
temperature (TC) of 25°C. Peak repetitive pulsed power
limits are determined by using the thermal response data
in conjunction with the procedures discussed in AN569,
“Transient Thermal Resistance − General Data and Its
Use.”
Switching between the off−state and the on−state may
traverse any load line provided neither rated peak current
(IDM) nor rated voltage (VDSS) is exceeded, and that the
transition time (tr, tf) does not exceed 10 μs. In addition
the total power averaged over a complete switching cycle
must not exceed (TJ(MAX) − TC)/(RθJC).
A power MOSFET designated E−FET can be safely
used in switching circuits with unclamped inductive
loads. For reliable operation, the stored energy from
circuit inductance dissipated in the transistor while in
avalanche must be less than the rated limit and must be
adjusted for operating conditions differing from those
specified. Although industry practice is to rate in terms
of energy, avalanche energy capability is not a constant.
The energy rating decreases non−linearly with an
increase of peak current in avalanche and peak junction
temperature.
100
VGS = 11 V
SINGLE PULSE
TC = 25°C
10
dc
10 ms
1 ms
1
0.1
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
http://onsemi.com
6
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部品番号 | 部品説明 | メーカ |
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MMSF10N02Z | Power MOSFET ( Transistor ) | ON Semiconductor |